International Scholarly Research Notices / 2012 / Article / Fig 6

Research Article

Barrier Evaluation by Linearly Increasing Voltage Technique Applied to Si Solar Cells and Irradiated Pin Diodes

Figure 6

(a) Simulated total current (black solid) at forward LIV bias composed of barrier (grey solid) and of storage capacitance (dot) currents as well as of recombination (light grey solid) and of diffusion (dash-dot) currents. (b) The simulated BELIV transients varying π‘ˆ 𝑃 of the forward LIV bias. (c) Experimental BELIV transients for forward- ( π‘ˆ 𝐹 ) biased diode varying ramp 𝐴 of LIV pulses. The pulse peak amplitude π‘ˆ 𝑃 = 0 . 3 V was kept invariable while pulse duration was varied.
543790.fig.006a
(a)
543790.fig.006b
(b)
543790.fig.006c
(c)

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