Voltage-Mode Universal Biquadratic Filter Using Single DVCC

Abstract

A voltage-mode universal biquadratic filter using a differential voltage current conveyor (DVCC), two capacitors, and two resistors is presented. The proposed circuit has four input terminals and three output terminals and can realize all the standard filter functions, which are lowpass, bandpass, highpass, notch, and allpass filters, without changing the circuit topology. Three simultaneous output filter responses can be obtained from some derived filter types. The proposed circuit employs only one DVCC that simplifies the configuration.

1. Introduction

Recently, there is a growing interest in designing current-conveyor- (CC-) or current-feedback-amplifier- (CFA-) based active filters. This is attributed to their high signal bandwidths, greater linearity, and larger dynamic range than OPAMP-based ones [1]. Note that a CFA is equivalent to a plus-type second-generation current conveyor (CCII) with a voltage follower [2].

Active filters are so widely used in electronic systems, such as telecommunications, radar, consumer electronics, instrumentation systems, and military ordnance, [1, 3]. Many voltage-mode universal biquadratic filters with multi-inputs were proposed [4–10]. From the different combinations of injection of input voltage signals, voltage-mode lowpass, bandpass, highpass, notch, and allpass filters can be obtained without changing the circuit topology. However, these circuits require at least two active components. Moreover, the universal biquadratic circuits in [4, 7–9] require one more active component for the unity-gain inverting input in the allpass realizations. In 2002, Horng et al. proposed a universal biquad with four inputs using three resistors, two capacitors, and one CFA [11]. However, it still requires one more active component for the unity-gain inverting input in the allpass realization. Two voltage-mode universal biquads each with three inputs using two resistors, two capacitors, and one CCII were presented in [12, 13]. However, each of these two circuits requires one more active component for amplifying the input signal in the notch and allpass realizations. A voltage-mode universal biquadratic filter using single plus-type CCII (CCII+), two resistors, and two capacitors was presented in [14]. However, only two standard filter types can be obtained simultaneously in the same circuit.

In this paper, a voltage-mode universal biquadratic filter circuit that has four input terminals and three output terminals is presented. It can realize all the standard filter functions, which is, lowpass, bandpass, highpass, notch, and allpass filters, without changing the circuit topology. With respect to the previous single active element universal biquad in Horng et al. [11], the proposed circuit employs less passive components does not need one more active component for the unity-gain inverting input in the allpass realization and the availability of two more simultaneous output filter responses from some derived filter types. With respect to the previous single CCII universal biquads in [12, 13], the proposed circuit does not need one more active component for amplifying the input signal in the notch and allpass realizations. With respect to the previous single CCII+ universal biquad in [14], one more simultaneous output filter response can be obtained from some derived filter types.

2. Proposed Circuit

The port relations of a CCII can be characterized by 𝑣_𝑥=𝑣_𝑦,𝑖_𝑧=±𝑖_𝑥, and 𝑖_𝑦=0. The CCII has a disadvantage that only one of the input terminals has high-input impedance (the 𝑦 terminal). The differential difference current conveyor (DDCC) [15] and DVCC [16] are extensions of the CCII and are specially defined to handle differential input voltage signals. Using standard notation, the port relations of a DDCC can be characterized by 𝑣_𝑥=𝑣_𝑦1−𝑣_𝑦2+𝑣_𝑦3,𝑖_𝑧𝑘=±𝑖_𝑥, and 𝑖_𝑦1=𝑖_𝑦2=𝑖_𝑦3=0; the port relations of a DVCC can be characterized by 𝑣_𝑥=𝑣_𝑦1−𝑣_𝑦2,𝑖_𝑧𝑘=±𝑖_𝑥, and 𝑖_𝑦1=𝑖_𝑦2=0. Considering the proposed voltage-mode circuit in Figure 1, the output voltage functions can be expressed as 𝑉_o1=𝑠²𝐶₁𝐶₂+𝑠𝐶₂𝐺₁−𝑠𝐶₂𝐺₂𝑉_in3+𝑠𝐶₁𝐺₂𝑉_in2+𝐺₁𝐺₂𝑉_in1+−𝑠𝐶₁𝐺₂−𝐺₁𝐺₂𝑉_in4×𝑠²𝐶₁𝐶₂+𝑠𝐶₁𝐺₂+𝐶₂𝐺₁−𝐶₂𝐺₂+𝐺₁𝐺₂⁻¹,𝑉_o2=−𝑠𝐶₂𝐺₂𝑉_in3+𝑠²𝐶₁𝐶₂+𝑠𝐶₁𝐺₂𝑉_in2+𝑠𝐶₂𝐺₁+𝐺₁𝐺₂𝑉_in1−𝑠𝐶₂𝐺₂𝑉_in4×𝑠²𝐶₁𝐶₂+𝑠𝐶₁𝐺₂+𝐶₂𝐺₁−𝐶₂𝐺₂+𝐺₁𝐺₂⁻¹,𝑉_o3=−𝑠²𝐶₁𝐶₂−𝑠𝐶₂𝐺₁𝑉_in3+𝑠²𝐶₁𝐶₂𝑉_in2+𝑠𝐶₂𝐺₁𝑉_in1+𝑠𝐶₁𝐺₂−𝑠𝐶₂𝐺₂+𝐺₁𝐺₂𝑉_in4×𝑠²𝐶₁𝐶₂+𝑠𝐶₁𝐺₂+𝐶₂𝐺₁−𝐶₂𝐺₂+𝐺₁𝐺₂⁻¹. (1)

Figure 1 

The proposed voltage-mode universal biquad.

From (1), we can see that thirteen circuit types can be obtained from Figure 1.(a)If 𝑉_in2=𝑉_in3=𝑉_in4=0 (grounded), 𝑉_in1 = input voltage signal, a lowpass filter can be obtained at 𝑉_o1 and a bandpass filter can be obtained at 𝑉_o3. (b)If 𝑉_in1=𝑉_in3=𝑉_in4=0 (grounded), 𝑉_in2 = input voltage signal, a bandpass filter can be obtained at 𝑉_o1 and a highpass filter can be obtained at 𝑉_o3.(c)If 𝑉_in1=𝑉_in2=𝑉_in4=0 (grounded), 𝑉_in3 = input voltage signal and 𝑅₂=𝑅₁, a highpass filter can be obtained at 𝑉_o1 and a bandpass filter can be obtained at 𝑉_o2.(d)If 𝑉_in1=𝑉_in2=𝑉_in3=0 (grounded), 𝑉_in4 = input voltage signal and 𝐶₂=𝐶₁, a bandpass filter can be obtained at 𝑉_o2 and a lowpass filter can be obtained at 𝑉_o3.(e)If 𝑉_in2=𝑉_in4=0 (grounded), 𝑉_in1=𝑉_in3 = input voltage signal and 𝑅₂ = 𝑅₁, a notch filter can be obtained at 𝑉_o1, a lowpass filter can be obtained at 𝑉_o2, and a highpass filter can be obtained at 𝑉_o3.(f)If 𝑉_in2=𝑉_in4=0 (grounded), 𝑉_in1=𝑉_in3 = input voltage signal and 2𝐶₂𝐺₂=𝐶₁𝐺₂+2𝐶₂𝐺₁, an allpass filter can be obtained at 𝑉_o1 and a highpass filter can be obtained at 𝑉_o3.(g)If 𝑉_in2=𝑉_in3=0 (grounded), 𝑉_in1=𝑉_in4 = input voltage signal and 𝑅₂=𝑅₁, a bandpass filter can be obtained at 𝑉_o1 and a lowpass filter can be obtained at 𝑉_o2.(h)If 𝑉_in1=𝑉_in4=0 (grounded), 𝑉_in2=𝑉_in3 = input voltage signal and 𝐶₂=𝐶₁, a highpass filter can be obtained at 𝑉_o2 and a bandpass filter can be obtained at 𝑉_o3.(i)If 𝑉_in1=𝑉_in3=0 (grounded), 𝑉_in2=𝑉_in4 = input voltage signal and 𝐶₂=𝐶₁, a lowpass filter can be obtained at 𝑉_o1, a highpass filter can be obtained at 𝑉_o2 and a notch filter can be obtained at 𝑉_o3.(j)If 𝑉_in1=𝑉_in3=0 (grounded), 𝑉_in2=𝑉_in4 = input voltage signal and 2𝐶₂𝐺₂=2𝐶₁𝐺₂+𝐶₂𝐺₁, a lowpass filter can be obtained at 𝑉_o1 and an allpass filter can be obtained at 𝑉_o3.(k)If 𝑉_in1=𝑉_in2=0 (grounded), 𝑉_in3=𝑉_in4 = input voltage signal, a bandpass filter can be obtained at 𝑉_o2.(l)If 𝑉_in2=0 (grounded), 𝑉_in1=𝑉_in3=𝑉_in4 = input voltage signal, 𝐶₂=𝐶₁, and 𝑅₂=2𝑅₁, a highpass filter can be obtained at 𝑉_o1 and a lowpass filter can be obtained at 𝑉_o2.(m)If 𝑉_in1=0 (grounded), 𝑉_in2=𝑉_in3=𝑉_in4 = input voltage signal, 𝑅₂=𝑅₁, and 𝐶₂=0.5𝐶₁, a highpass filter can be obtained at 𝑉_o2 and a lowpass filter can be obtained at 𝑉_o3.

Thus, the circuit is capable of realizing all voltage-mode filter functions. Note that three standard filter responses can be obtained simultaneously from the circuit types (e) and (i).

3. Nonideality Analysis of the DVCC

Taking into consideration the DVCC nonidealities, the port relations of DVCC can be expressed as 𝑣_𝑥=𝛼₁𝑣_𝑦1−𝛼₂𝑣_𝑦2,𝑖_𝑧=±𝛽_𝑘𝑖_𝑥, (2) where 𝛽_𝑘=1−𝜀_𝑘𝑖 and 𝜀_𝑘𝑖(|𝜀_𝑘𝑖|≪1) denotes the current tracking error from 𝑥 terminal to 𝑧_𝑘 terminal of a DVCC, 𝛼₁=1−𝜀_𝑣1 and 𝜀_𝑣1(|𝜀_𝑣1|≪1) is the input voltage tracking error from 𝑦₁ terminal to 𝑥 terminal of a DVCC, and 𝛼₂=1−𝜀_𝑣2 and 𝜀_𝑣2(|𝜀_𝑣2|≪1) is the input voltage tracking error from 𝑦₂ terminal to 𝑥 terminal of a DVCC. The denominator of the nonideal output voltage function for Figure 1 becomes 𝐷(𝑠)=𝑠²𝐶₁𝐶₂+𝑠𝐶₁𝐺₂𝛼₂𝛽₂+𝐶₂𝐺₁−𝐶₂𝐺₂𝛼₁𝛽₁+𝐺₁𝐺₂𝛼₂𝛽₂. (3) The resonance angular frequency and quality factor are obtained by 𝜔_𝑜=𝐺₁𝐺₂𝛼₂𝛽₂𝐶₁𝐶₂,𝑄=𝐶₁𝐶₂𝐺₁𝐺₂𝛼₂𝛽₂𝐶₁𝐺₂𝛼₂𝛽₂+𝐶₂𝐺₁−𝐶₂𝐺₂𝛼₁𝛽₁. (4) The active and passive sensitivities are low and obtained by 𝑆^𝜔𝑜_{𝐺1,𝐺2,𝛼2,𝛽2}=−𝑆^𝜔𝑜_𝐶1,𝐶2=12,𝑆^𝑄_𝐶1≅𝐶₂𝐺₁−𝐶₁𝐺₂−𝐶₂𝐺₂2𝐶₁𝐺₂+𝐶₂𝐺₁−𝐶₂𝐺₂,𝑆^𝑄_𝐶2≅𝐶₁𝐺₂+𝐶₂𝐺₂−𝐶₂𝐺₁2𝐶₁𝐺₂+𝐶₂𝐺₁−𝐶₂𝐺₂,𝑆^𝑄_𝐺1≅𝐶₁𝐺₂−𝐶₂𝐺₁−𝐶₂𝐺₂2𝐶₁𝐺₂+𝐶₂𝐺₁−𝐶₂𝐺₂,𝑆^𝑄_𝐺2≅𝐶₂𝐺₁+𝐶₂𝐺₂−𝐶₁𝐺₂2𝐶₁𝐺₂+𝐶₂𝐺₁−𝐶₂𝐺₂,𝑆^𝑄_𝛼1,𝛽1≅𝐶₂𝐺₂𝐶₁𝐺₂+𝐶₂𝐺₁−𝐶₂𝐺₂,𝑆^𝑄_𝛼2,𝛽2≅𝐶₂𝐺₁−𝐶₁𝐺₂−𝐶₂𝐺₂2𝐶₁𝐺₂+𝐶₂𝐺₁−𝐶₂𝐺₂. (5)

4. Simulation Results

HSPICE simulations were carried out to demonstrate the feasibility of the proposed circuits using 0.18 μm, level 49 MOSFET from TSMC. The DVCC was realized by the CMOS implementation in Figure 2 [17] with the NMOS and PMOS transistor aspect ratios 𝑊/𝐿=4.5u/0.9 u and 𝑊/𝐿=9u/0.9 u, respectively. The supply voltages are 𝑉+=+0.9V,𝑉−=−0.9V, and 𝑉_𝑏=−0.38V.

Figure 2 

The CMOS DVCC implementation.

Figures 3(a)–3(c) represent the simulated frequency responses for the notch (𝑉_o1), lowpass (𝑉_o2), and highpass (𝑉_o3) filters of Figure 1, respectively, designed with 𝑉_in2=𝑉_in4=0 (grounded), 𝑉_in1=𝑉_in3= input voltage signal, 𝑄=1, and 𝑓_o=318.3kHz: 𝐶₁=𝐶₂=50pF and 𝑅₁=𝑅₂=10kΩ.

(a)

(b)

(c)

Figure 3 

Simulated frequency responses of Figure 1 designed with 𝑉in2=𝑉in4=0 (grounded), 𝑉in1=𝑉in3 = input voltage signal, 𝐶1=𝐶2=50pF, and 𝑅1=𝑅2=10kΩ: (a) notch filter (𝑉o1), (b) lowpass filter (𝑉o2), and (c) highpass filter (𝑉o3).

Figures 4(a) and 4(b) represent the simulated frequency responses for the allpass (𝑉_o1) and highpass (𝑉_o3) filters of Figure 1, respectively, designed with 𝑉_in2=𝑉_in4=0 (grounded), 𝑉_in1=𝑉_in3 = input voltage signal, 𝑄=1.414, and 𝑓_o=450.16kHz: 𝐶₁=𝐶₂=50pF,𝑅₁=10kΩ, and 𝑅₂=5kΩ.

(a)

(b)

Figure 4 

Simulated frequency responses of Figure 1 designed with 𝑉in2=𝑉in4=0 (grounded), 𝑉in1=𝑉in3= input voltage signal, 𝐶1=𝐶2=50pF,𝑅1=10kΩ, and 𝑅2=5kΩ: (a) allpass filter (𝑉o1), and (b) highpass filter (𝑉o3).

5. Conclusions

In this paper, a new voltage-mode universal biquadratic filter has been presented. The new voltage-mode circuit with four input terminals and three output terminals employs two capacitors, two resistors, and one DVCC. The new circuit has the features of using only four passive components and does not need one more active component in the realizations of notch and allpass filters and the availability of three simultaneous output filter responses from some derived filter types (types (e) and (i)).

Acknowledgment

The National Science Council, China, supported this work under Grant no. NSC 101-2221-E-033-070.