Research Article

Low Power Decoding of LDPC Codes

Table 5

Comparison of ATBF decoder implementation with published results.

ATBF Decoder [19] [21] [22] [23] [24] [20]

Process (nm) 90 180 90 65 160 180 65
Algorithm ATBF SBF Block-interlaced Layered-SP SP Layered-SP SP
Code size (m, n) (504,1008) (813,1057) (480,660) (900,1200) (512,1024) (1024,2048) (384,2048)
Clock frequency (MHz) 250 345 142 528 64 125 195
Total area (mm2) 0.729 7.4 3.1 0.21 52.5 14.3 4.84
Total power (mW) 33.14 1450 690 787 1359
Average throughput (Gb/s) 25.2 17.37 (max)
0.25 (min)
5.86 0.53 1.0 0.64 92.8
Average iterations 10 1 (max)
40 (min)
16 8 64 10 11
Energy/bit (pJ) 1.3 83.5 (max) 10.8 123.0 15