High-Frequency and Low-Power Output Stages Based on FGMOS Flipped Voltage Follower

Table 4

Simulation results of designed conventional and proposed circuits.

Simulated circuit	Power supply (V)	Output impedance (Ω)	Voltage gain	Power dissipation (mW)
Simple FVF	3.0	54.34	0.91	1.5
Conv. FGMOS-based FVF	1.0	65.09	0.95	0.5
Conv. FVF-based output stage	3.0	52.82	0.89	1.18
Prop. FVF-based output stage	0.8	51.45	0.91	0.0062
Conv. class AB FVF buffer	3.0	196.91	0.93	1.22
Prop. class AB FVF buffer	1.8	106.71	0.99	0.071