Groebner Bases Based Verification Solution for SystemVerilog Concurrent Assertions

Table 3

Table of Johnson counter output.

Counter (clock)	𝑣3(𝑚3)	𝑣2(𝑚2)	𝑣1(𝑚1)
0	0	0	0
1	1	0	0
2	1	1	0
3	0	1	1
4	0	0	1
5	0	0	0