Journal of Applied Mathematics

Volume 2014, Article ID 658674, 11 pages

http://dx.doi.org/10.1155/2014/658674

## Dynamic Sliding Mode Evolution PWM Controller for a Novel High-Gain Interleaved DC-DC Converter in PV System

Key Laboratory of Smart Grid of Ministry of Education in Tianjin University at Tianjin, Tianjin 300072, China

Received 5 January 2014; Revised 17 April 2014; Accepted 23 April 2014; Published 21 May 2014

Academic Editor: Hongjie Jia

Copyright © 2014 Taizhou Bei et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

#### Abstract

Considering the disadvantages of the traditional high-gain DC-DC converter such as big size, high voltage stress of switches, and large input current ripple, a novel high-gain interleaved boost converter with coupled-inductor and switched-capacitor was proposed correspondingly and the operation principle together with the steady-state analysis of this converter was also described. Besides, a new control approach-dynamic sliding mode evolution PWM controller (DSME PWM) for the novel topological converter based on both dynamic evolution and sliding mode control was also presented. From the simulation results and experimental validation the proposed converter can fulfill high-gain boost, low ripple of both the input current and the output voltage. Furthermore, MPPT technique can be also achieved in a short time by simulation. The efficiency and stability of the converter proposed in this paper can be improved.

#### 1. Introduction

Photovoltaic (PV) generation has an increasing influence on alleviating the energy crisis and reducing the environmental pollution. Researchers around the world have devoted themselves to the performance of PV system such as stability, efficiency, and the cost as a consequence (as discussed by [1–3]). Generally, the outputting voltage of the PV arrays ranges from 30 V to 60 V. High-gain and high-efficiency DC-DC converters are required to boost the low PV voltage to a high voltage, such as 380 V for the full-bridge inverter or 760 V for the half-bridge inverter in the 220 V AC grid-connected power system.

The good performances of any high-gain DC-DC converter in PV system greatly depend on the employed topology and the corresponding control strategy. So when designing this kind of converters, one should pay more attention to these two aspects and ensure that the designed converter can minimize the current ripple and reduce the numbers of the electrolytic capacitors, which can reduce the circuit cost and easily achieve MPPT algorithms (as discussed by [4, 5]). Besides, power losses that existed in the converters in high-output-voltage applications should be decreased to improve system efficiency (as discussed by [6]). This paper will devote itself to a novel scheme that can meet the requirement above.

The traditional boost converters can achieve any high-gain transform by adjusting the duty cycle theoretically; however the actual voltage gain is often limited by the parasitic parameters of inductances, capacitances, and switch devices (as discussed by [7]). Furthermore, in high-gain applications, as the duty cycle increases, the input current ripple, voltage or current stress of the devices, and the switching loss are all increasing as well as the diodes’ reverse recovery loss, decreasing the efficiency of the converters. Meanwhile electromagnetic interference (EMI) is further severe due to the excess of . Boost converter can enhance its voltage gain via adding coupled inductances (as discussed by [8–10]). However, voltage spike will occur when turning off the switches due to the leakage inductances, which can result in voltage stress increasing, efficiency lowering, and severe EMI. The aforementioned problems can be relieved by active or passive clamping methods. Undoubtedly, it will make the main circuit, control strategy and drive mode more complicated (as discussed by [11, 12]). Another way to improve the voltage gain of conversion is to employ nonisolated cascade boost converters (as discussed by [13]). However there are many disadvantages, such as low reliability, high costs, and complexity of main circuit as well as control strategy and drive methods; besides, the outputting diodes’ reverse recovery problem is still serious in high-gain applications. Isolated boost converters can also achieve high-gain transform by designing the ratio of transformers (as discussed by [12, 14]), but the leakage inductances will cause many problems such as voltage overshoot of switches, big voltage stress, and EMI problems. Meanwhile the loss of transformers will result in lower efficiency, higher costs, and complexity of main circuit, control strategy, drive methods, and isolation design. The topology-combining boost converters and fly-back converters can be employed in the high-step-up transform (as discussed by [15, 16]), whose topology and control method are fairly simple; however the voltage balance of the capacitors exists in this system due to series connection.

The reverse-recovery loss of the output diode is one of the main reasons why the efficiency is limited in the high step-up applications. When the boost converter works on discontinuous current mode (DCM) or critical current mode (CRM), the reverse-recovery loss can be reduced, but it will increase both current stress and input current ripple. Therefore it is not suitable for the high-power applications due to the bulky filter circuit.

Interleaved boost converters can not only develop both power level and power density but also average the thermal stress distribution and reduce the input current ripple (as discussed by [17–19]), which can even be eliminated when the duty cycle is equal to 0.5 theoretically. However, there are some weaknesses to apply interleaved boost converter into PV grid-connected system directly (as discussed by [7, 18]). The step-up ratio is not increased efficiently comparing with the traditional single-stage boost converter, as well as the voltage stress of switches. Besides, it is very sensitive for ordinary interleaved boost converters to mismatch the duty cycle.

In allusion to all the problems mentioned above, a novel high-gain interleaved converter with coupled inductance and switched capacitor (hereinafter referred to as the new converter) is proposed. High-gain transform can be realized by designing the main circuit parameters reasonably. Furthermore, the topology as well as its control method is relatively simple. Compared with conventional interleaved boost converters, the new one can boost voltage on the great scale, while reducing the voltage stress of the switch devices significantly under the same duty cycle. Moreover, the volume of magnetic elements and the current ripple of the inductance can be reduced by introducing coupled inductance (as discussed by [8, 9, 14]).

Control strategy of the proposed converter can easily achieve the MPPT algorithms and minimize the current ripple to reduce the coupled inductance losses and to improve system efficiency and stability. Moreover, less computation should also be under the consideration to ease the computational complexity. It is worth noting that, in the literature, some examples of high-gain DC-DC converters are presented, but they only concern the topologies, while few papers are devoted to the controller design for such kind of converter, although not referring to PV applications.

Sliding mode control (SMC) has a high robustness against plant uncertainty and external disturbances, including those due to the environmental conditions in PV applications. Many SM-based MPPT algorithms operated in different applications or different topologies have been proposed in published papers, but most of those mainly focus on the SMC used in conventional boost converter. Nevertheless, such an approach has never been used in analyzing a class of interleaved boost converters for PV applications controlled by the SM-MPPT technique.

The controller of the proposed new converter is required to extract the maximum energy from the PV panels and output the stable expectant voltage without errors. Dynamic evolution control (DEC) as a new control technique has been utilized in power electronics converters (not in PV applications). DEC can ensure that the error state goes to zero in increase of time, thereby improving the dynamic characteristic of system.

A new control approach based on both SM-MPPT and DEC is proposed in this paper. Since the outputting voltage and current of PV cell together with the outputting voltage of converter are involved in calculation of duty cycle, all the variation above can be compensated in the dynamic evolution.

This paper is organized as follows. Section 2 describes the characteristic of PV cells. Section 3 gives the working principle and performance analysis of the new converter. Section 4 is devoted to the controller design on basis of SM-MPPT and DEC. Sections 5 and 6 afford the simulation results and experimental validation, respectively. In the conclusion, the main results are finally summarized.

#### 2. Characteristic of PV Cells

Formulas of the outputting current and power for the PV cells can be seen from (1) (as discussed by [3]) and Figure 1 shows the output characteristics of PV cells: where , are the outputting current and voltage of PV cells, is the photocurrent of a single solar module, is the reverse saturation current, is Boltzmann constant, is electric charge, is operating temperature, and is P-N junction ideal factor.

When the output of the equivalent circuit of PV cells is shorted, if neglecting the reverse leakage current of the diodes, we can make an approximation that ( is the short-cut current), which will be used in part for analyzing the inputting current in dynamic mode.

#### 3. Principle and Steady-State Analysis

##### 3.1. Principle of the New Converter

The new converter with PV panels is shown in Figure 2. Capacitors , and diode VD_{1} are employed to further enlarge the boost voltage under the same duty cycle compared with any other topology.

The inductances and are closely coupled and with the same winding orientation. The coupled inductances can be represented as a mutual inductance , two equivalent leakage inductances and . The equivalent circuit is shown in Figure 3.

The relationships of the inductances are related by the following equations: where is coupled coefficient.

In order to simplify the circuit analysis of the proposed converter, several necessary assumptions should be made as follows.(1)All components including power switches, magnetic components, and diodes are ideal; the on-state resistance and all parasitic capacitances of the switches are neglected, as are the forward voltage drops of diodes VD_{1}~VD_{3}.(2)The ESR of capacitors and the parasitic resistance of coupled inductances are neglected.(3).(4) and work by turn and both are driven by PWM signals.

Referring to the equivalent circuits for four different switching states of a switching period shown in Figure 4 and the waveforms in Figure 5, the operation of the converter can be explained as follows.

*Mode 1* (Figure 4(a)). At time , is on while is off; the current in the inductance starts to rise linearly while continues to discharge (the current in was acquired in the last switching period). Capacitor discharges, leading to its voltage falling. But the voltage of capacitor rises because is charged; besides, capacitor is charged by input voltage and inductor in this mode. The rates of change of and are approximately given by

*Mode 2* (Figure 4(b)). At time , falls to zero. continues to rise linearly. is charged by capacitor . The rate of change of is
where .

*Mode 3* (Figure 4(c)). At time , is off while is on. starts to rise linearly from zero and starts to discharge. Besides, discharges too while starts to charge. Moreover, is charged by input voltage and inductor. The rates of change of and are approximately given by

*Mode 4* (Figure 4(d)). At time , is off while is on, falls to zero. continues to rise linearly. is charged by capacitor . The rate of change of is
where .

The switching period will be repeated when is on again at time .

##### 3.2. Steady-State Analysis

Assume that the current waveforms shown in Figure 5 have reached a steady state. From the waveform as shown in Figure 5, it can be found that From the waveform as shown in Figure 5, it can be found that: Also from Figure 5, the average values of and , denoted as and , respectively, are found as Assume that the converter is lossless; that is, the input power is equal to the output power . Consider where is the load resistance.

In principle, (7) and (9)–(12) can be solved to find . However, to simplify the calculation, it is assumed that , , , and . According to some algebraic manipulations and solving a quadratic equation derived from (12), the approximate values of , and can be referred as follows: The effect of on the calculation is very little; thus it is neglected when getting the approximate values, as shown in (13) and (14).

A careful study of the waveforms shown in Figure 5 will reveal the following interesting facts.(1)As far as the input current is concerned, the converter appears to operate in CCM (because is continuous). Thus, the peak current stress of the inductances and the input current ripple can be maintained relatively low.(2)However, since and are discontinuous, the new converter is actually operating in DCM. Also, since the rectifier diodes turn off before turns on, the reverse-recovery loss of the rectifiers is eliminated.(3)Besides, the current of inductance / has fallen to zero before / turns on. ZCS soft switching operation during the whole switching transition is achieved.

Furthermore, when considering the parasitic resistances of switches and capacitances ( and ), the switching loss due to capacitances in the course of charging can be defined as (15) in an independent converter which contains capacitances: where is the value of capacitances and .

From (15), do exist even under the ideal conditions, mainly depending on . Thus, in order to reduce , the difference between the maximum and the minimum of voltage in the course of charging for all capacitances should be decreased.

#### 4. DSME PWM Controller

The original intention of the DSME control is to achieve MPPT as well as high-gain boost, also to reduce the error state by forcing the error state to follow the specific path, which ensures the error state goes to zero in increase of time (as discussed by [19, 20]). The control flow chart of dynamic sliding mode evolution PWM Controller can be seen in Figure 6.

The modulating signal of PWM generation is produced by the formula , combing the sliding mode theory with the dynamic evolution algorithm. The specific design process of the DSME controller can be described as follows.

##### 4.1. MPPT by Sliding Mode Control

When the PV cells run at the point of maximum power In SMC, the state space is divided into and by sliding manifold (). The movement on can be called sliding mode dynamics. Considering , the sliding manifold can be chosen as (as discussed by [21, 22]) Reconsidering the mathematical model of PV cell, Directly substituting from (18) into (17), The differential form of is According to , if , then , , will increase when tends to sliding manifold, and if , then , , will decrease when tends to sliding manifold. The dynamic accommodation of can be seen in Figure 7.

Considering that the new converter is composed of two paralleled boost converters, the purpose of the additional switched capacitor and coupled inductance is to increase the voltage gain. Thus, the drive signals for the switches can be designed, respectively. From the state space model of the single boost converter, when the switch is on, increases and when the switch is off, decreases (as discussed by [23]).

Rearranging (17), The differential form approximates to Thus, Theoretically, in the case of low requirement, both (17) and (24) can be chosen as the sliding surface: The corresponding control law is

##### 4.2. Evolution Path Selection

The principle of determining the evolution path is to ensure that the error state can go to zero at any increase of time (as discussed by [24, 25]). In this research, the evolution path is an exponential function as shown in Figure 8.

With this exponential evolution path, the value of the dynamic characteristic of the converter will decrease exponentially to zero by where is the dynamic characteristic of system, is the initial value of , and is a dynamic evolution factor. The derivative of is

##### 4.3. Analysis of Duty Cycle

In order to synthesize the control law of the dynamic evolution controller, the dynamic equation of converter system has to be established and analyzed. On basis of the state space average model, when the converter works on DCM, the voltage and current dynamics of the converter are given by where is the inductance, is the input voltage, is the input current, is the output voltage, and is the duty cycle, respectively.

, rearranging (28), the output voltage of converter can be written as Define a linear voltage error function as shown below where .

Substituting (27) into (31), yields Combining (31) with (32) Directly substituting the converter output voltage from (30) into (33) The obtained duty cycle formula is given by Formula (35) forces the state error function to satisfy the dynamic evolution function (27). Consequently, the state error function is forced to make evolution by following equation (35) and decrease to zero () with a decrease rate . The outputting voltage of converter converges to the converters steady state:

From the synthesis procedure, it is clear that the dynamic evolution controller works on the full nonlinear system and does not need any linearization or simplification on the system model at all and it is interesting to note that the control law in (35) consists of four distinct parts. The first part is the feed-forward term which is calculated based on the duty cycle at the previous sampling instant. This term compensates for variations in the input voltages. The second and third terms consist of proportional and derivative terms of the perturbations in the output voltage, respectively. The last term consists of the derivative terms of the inductance current. Since the inputting and outputting voltages and inductance current are involved in calculation of duty cycle, it can compensate all the variation of them in the dynamic evolution.

It should be noted that both and are not the voltage and current at the MPP in (35). Consequently, we expect that the controller can achieve MPPT and high-gain boost; thus considering the logic relationship of control signals, the final control law can be described as follows combing (25) with (35):

##### 4.4. PWM Generation

The PWM signals are generated by comparing a control signal with a constant peak repetitive triangle signal (). The frequency of the repetitive triangle signal establishes the constant switching frequency.

Figure 9 shows the PWM signals generation technique. PWM1 is produced when the control signal is greater than while PWM2 is produced when is less than .

The values of the desired duty cycle can be gotten from (37). PWM signals are generated by (39):

#### 5. Simulation

Some simulation has been done in order to verify the performance of the topology and the main parameters can be referred to in Table 1.

The portion of the simulation results is given in Figure 10.

Figure 10(a) shows the driving signals for and , which are generated by the control law . The outputting voltage and power of PV cell in process of MPPT can be seen in Figure 10(b). From the simulation, one may get the conclusion that the DSME PWM controller can ensure that the PV cell runs at the maximum power point in a short time. Although the overshoot with a little range occurs in the process of power adjustment, it will be eliminated soon and the stable outputting power of 260 W is achieved. During the dynamic adjustment, there is a stable and fleet performance without oscillation.

In Figure 10(c), the dynamic response of the novel topology is the curve labeled overall trend. This curse shows that the converter can raise the voltage from 36 V to 400 V steadily without a long time. The curve labeled partial enlargement shows that the outputting voltage has a low voltage ripple when it is in stable state. Considering the whole PV grid-connected system, a DC-link high voltage with low ripple is convenient to choice and maintaining of the DC-link capacitor.

As mentioned before, the converter can run under four modes in every switching period. The tendencies of and as well as in every mode have been discussed in part III and it is also easy to get the conclusion about based on Kirchhoff’s current law, so the tendency of can be obtained by the sum of and . The first and second one of Figure 10(d) describe the stable current of and and , respectively, over the same period in stable mode. Figure 10(d) shows that the current has little ripple, which can reduce the coupled inductance losses and improve system efficiency.

Figure 10(e) shows the voltage waves of switched capacitors and . The voltage of is three times as much as the one of , close to three quarters of ; this simulation verifies the formula (13).

#### 6. Experiments

Experiments have been finished in our laboratory just in order to verify the validity of theoretical analysis above and the performance of the new converter proposed in this paper.

Experimental waveforms of the new converter are shown in Figure 11. The driving signals of and from DSP on basis of the algorithm in this paper are given in Figure 11(a). Obviously, the new converter can raise the voltage from 36 V to 400 V when the duty cycle equals 0.64 (calculated from Figure 11(a)). The output voltage wave (after 10 times attenuation) is shown in Figure 11(b). Moreover, the ripple of the output voltage shown in Figure 11(b) can be limited in 8 V, which can decrease the loss of switched capacitors as shown in (15). Figure 11(c) shows the wave of the input current. The little input current ripple can reduce both the loss and the volume of the coupled inductance. Figures 11(d) and 11(e) show the voltage waveform of switched capacitors and , respectively (after 10 times attenuation). The voltage of , about 300 V~306 V, is three times as much as the one of , about 92 V~100 V, which is consistent with both the analysis and the simulation results above; besides, the difference between the maximum and the minimum of voltage in the course of charging for each capacitance can be limited to a fairly small range, which can decrease the loss of switched capacitors.

Burrs existing in experimental waveform mainly stem from the effect of EMI in the experiment.

#### 7. Conclusion

This paper proposed a new high-gain interleaved converter with coupled inductances and switched capacitors network which are suited for PV application. After explaining its operating principle and analyzing its steady-state performance, then a control strategy for it on basis of SM-MPPT and DEC theory was designed. Both simulation analysis and experimental results showed that the proposed system had the following good performance.(1)Achieving MPPT and producing a high-gain voltage in an extremely short time.(2)Decreasing the ripple of the outputting voltage, as well as the inputting current and improving power density.(3)Reducing the volume of magnetic components and cutting the cost of system.

#### Conflict of Interests

The authors declare that there is no conflict of interests regarding the publication of this paper.

#### Acknowledgment

This work is supported by the Specialized Research Fund for the Doctoral Program of Higher Education of China (no. 20120032110070).

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