#### Abstract

In order to solve the low-frequency oscillation of pulse-train- (PT-) controlled switching converter operating in a continuous conduction mode (CCM), a dual-carrier pulse-train (DCPT) control technique is proposed in this paper. With the CCM buck converter as an example, the operational principle, pulse control law, and output voltage ripple of the DCPT-controlled converter are studied. The experimental results are provided to verify the theoretical analysis and simulation results. Compared with the PT-controlled converter, the DCPT-controlled CCM buck converter enjoys much better operating characteristics and smaller output voltage ripple.

#### 1. Introduction

With the development of electronic technology, the steady-state performance and transient response of power supplies are very important in many electronic devices. However, for pulse-width modulation (PWM) switching DC-DC converters, with the disadvantages of slow transient response and complicated compensational network, it is hard to meet the requirements of modern electronic equipments [1–4].

In order to get a great transient response, a pulse-train (PT) control technique for DC-DC converter was proposed [5]. When the PT-controlled switching converter operates in discontinuous conduction mode (DCM), the output voltage will increase during each high-energy pulse *P*_{H} and decrease during each low-energy pulse *P*_{L}, which improves the transient characteristic of the converter. Qin and Xu [6] proposed a multiple pulse-train (MPT) control technique by setting several duty cycle pulses to get better output characteristics. Qin and Xu [7] introduced a current-referenced pulse-train (CRPT) control technique to enlarge the load range and improve the voltage accuracy of the converter. Considering the spectrum of the switching converter, the bi-frequency pulse-train (BFPT) control technique was proposed [8]. However, all the control techniques mentioned above were used in DCM converters, which limited the applications.

Wang et al. [9] applied the PT control technique to a buck converter operating in the continuous conduction mode (CCM) and indicated that the low-frequency oscillation existed at this time, which confused the pulse control law and enlarged the output voltage ripple. In order to solve this problem, several control techniques have been proposed. By limiting the valley value of the inductor current, the valley current mode PT (VCM-PT) controlled buck converter eliminated the low-frequency oscillation, but it limited the output power range at the same time [10]. By detecting the load current, the sliding current valley PT (SCV-PT) controlled buck converter changed the valley value of the inductor current adaptively and improved the output power range of the converter [11]. However, load current, inductor current, and output voltage were detected at the same time for SCV-PT control, which is quite complicated. Sha et al. [12] indicated that by limiting the peak value of the capacitor current within one switching cycle, the low-frequency oscillation could be eliminated, although the control parameters were complicated to design. By controlling the leading edge of the pulse, the pulse phase shift-based PT (PPS-PT) control was proposed [13]. Although the PPS-PT-controlled buck converter could eliminate the low-frequency oscillation, it weakened the transient characteristic. In [14], the PT control technique was applied to boost converter operated in the pseudo continuous conduction mode (PCCM). This converter enjoyed wide power range without low-frequency oscillation, but the efficiency of the converter was poor due to the freewheeling phase. In addition, by improving the topology of the converter, the low-frequency oscillation could be suppressed, but it was complicated to the integration of the switching converter [15–20].

In this paper, a dual-carrier pulse-train (DCPT) control technique is proposed and studied in detail. In the DCPT-controlled CCM buck converter, the capacitor current is limited to the preset valley current by a carrier signal at the beginning of each switching cycle. The output voltage will increase during one *P*_{H} switching cycle and decrease during each *P*_{L} switching cycle, which indicates that the low-frequency oscillation did not exist in the DCPT-controlled converter. The theoretical analysis, simulation, and experimental results verify that the DCPT-controlled CCM buck converter enjoys small output ripple and fast transient response.

#### 2. Operational Principle

For a buck converter, when the switch *S* is on, the inductor current will increase with a slope of ; when *S* is off, the inductor current will decrease with a slope of . Since the capacitor current reflects the ripple of the inductor current completely, the slope of the capacitor current is also or when the switch is on or off, respectively. If a control signal with a slope of is applied to the capacitor current, the capacitor current will move along with the trajectory of after the switch turns off.

Figure 1(a) shows the schematic diagram of the DCPT-controlled buck converter. In the controller, a comparator is used to compare the output voltage of the switching converter with a reference value, a sense resistor connected to the output capacitor and its auxiliary circuit are employed to obtain the capacitor current, and two D/A converters are acquired to generate the carrier signals. Besides that, there is no extra compensational network in the controller, which indicates the DCPT-controlled converter enjoys convenient design process and fast response. The main working waveforms including capacitor current *i*_{c}, control pulse control signal , and output voltage are shown in Figure 1(b). The carrier signals and generated by the controller have the same valley current *I*_{v} and slope *V*_{ref}/*L*. However, the frequency of or is different, which is *f*_{H} or *f*_{L}, respectively. Because the control pulse is generated by comparing the capacitor current with the carrier signal in the DCPT controller, the switching frequency of the converter is also *f*_{H} or *f*_{L} correspondingly.

**(a)**

**(b)**

The working principle of the DCPT-controlled buck converter is as follows. The carrier signal is chosen between and . When decreases to the valley current *I*_{v}, the switch *S* turns on immediately, and the output voltage is compared with the reference voltage *V*_{ref}. If < *V*_{ref}, the carrier signal is selected as . When the capacitor current *i*_{c} > , the switch *S* turns off, which is recorded as a high-energy pulse *P*_{H}. Similarly, if ≥ *V*_{ref} at the time when decreases to *I*_{v}, the carrier signal will be selected. When *i*_{c} > , *S* turns off, which is recorded as the low-energy pulse *P*_{L}. When the converter operates in a steady state, the DCPT controller will generate a pulse train, which consists of *P*_{H} and *P*_{L} to stabilize the output voltage.

#### 3. Steady-State Analysis

##### 3.1. Design of Control Parameters

In order to avoid low-frequency oscillation, the output voltage should be increased during *P*_{H} and decreased during *P*_{L}. Based on this principle, the control parameters, the frequencies of the carrier signals, and the valley current can be designed properly.

Figure 2 shows the capacitor current waveform of the DCPT-controlled buck converter within one switching cycle. For the switching converter with a low output voltage, the on-state voltage of the diode has a significant influence on the process of control law analysis. When the on-state voltage *V*_{D} of the diode is considered, the rising or falling slope of the capacitor current is (*V*_{in} − *V*_{o})/*L* or (*V*_{o} + *V*_{D})/*L,* respectively.

During *t*_{1} or *t*_{2}, the peak value of the capacitor current *I*_{p} can be expressed as

By combining equations (1) and (2), we have

Based on Figure 2 and equation (3), the area of the triangle *ABC* can be written as

The area of the quadrangle *BCED* within one switching period *T* is

Similarly, the areas of the triangle *BOD* and the triangle *CFE* can be expressed as

According to equation (6), the charge variation of the output capacitor during one switching cycle *T* can be calculated as

During the conduction time of the switch, *I*_{p} can be written as

By combining equations (7) and (8), it is available that

Therefore, the variation of the output voltage within one switching cycle can be calculated as

By choosing different *T*_{H} or *T*_{L}, the variation of the output voltage within *P*_{H} or *P*_{L} can be obtained as

Based on equation (11), the output voltage iterative equation of the DCPT-controlled buck converter can be expressed as

According to the principle of the DCPT control technique, and should be guaranteed. Therefore, it is available that

The control parameter *I*_{v} can be determined by the preset input voltage range of the converter. Since the falling slope of the carrier signals and is /*L*, the peak value of the carrier signals can be calculated when the frequencies of the carrier signals *f*_{H} and *f*_{L} and the valley current *I*_{v} are determined. Based on the analysis above, the parameters of the researched the DCPT-controlled buck converter are listed in Table 1.

From equation (12), it can be known that the output voltage variations and vary with the input voltage *V*_{in}. In order to achieve and , *V*_{in} would be limited within a valid range.

Assuming the output voltage variation is zero in one *P*_{H} switching cycle (), the lower boundary of the input voltage for the DCPT-controlled buck converter will be calculated as

Similarly, assuming the output voltage variation is zero in one *P*_{L} switching cycle (), the upper boundary of the input voltage will be

Substituting the parameters of Table 1 into equation (14), the operating range of the input voltage can be calculated, which is [8.11 V, 19 V]. When the input voltage varies in this range, the output voltage will increase during each *P*_{H} and decrease during each *P*_{L}; thus, the low-frequency oscillation can be avoided.

By using equation (12), the relationship between the output voltage variation and and the input voltage *V*_{in} can be obtained, as shown in Figure 3. It can be seen that, with the increasing input voltage, the variation of the output voltage increases and decreases.

##### 3.2. Analysis of Pulse Control Law

According to the principle of charge balance, the variation of the output voltage is zero in a whole pulse train, that is,

By combining equations (12) and (16), it can be obtained that

Substituting the parameters shown in Table 1 into equation (17), the relationship between the pulse ratio *μ*_{H}/*μ*_{L} and the input voltage *V*_{in} can be obtained, as shown in Figure 4. It can be known that, the pulse ratio *μ*_{H}/*μ*_{L} decreases gradually with the increase of *V*_{in}, which is caused by the increase of and the decrease of . Therefore, the proportion of the high-energy pulse *P*_{H} in the pulse train gradually decreases with the increase in the input voltage.

According to equation (17), the typical pulse train of the DCPT-controlled buck converter in the condition of different input voltages can be obtained, as listed in Table 2.

##### 3.3. Analysis of the Output Voltage Ripple

To analyse the output voltage variation, the capacitor current *i*_{c} and output voltage of the DCPT-controlled buck converter within one switching cycle are shown in Figure 5.

During [0, *t*_{on}], the capacitor current *i*_{c} (*t*) and the output voltage of the converter can be written as

By taking the derivation of equation (19), one obtains

Substituting the parameters listed in Table 1 into equation (20), it can be known that the output voltage rises to the maximum at the time *t*_{on}. Therefore, it is available that

For the DCPT-controlled buck converter, the output voltage ripple is closely related to the pulse train. Taking the pulse train 2*P*_{H}-1*P*_{L} as an example, the capacitor current *i*_{c} and the output voltage are shown in Figure 6(a). Obviously, the output voltage ripple of the converter is at this time.

**(a)**

**(b)**

In general, when the pulse train is *nP*_{H}-1*P*_{L}, the output voltage ripple of the converter is

When the pulse train is 1*P*_{H}-*nP*_{L}, the capacitor current *i*_{c} and the output voltage are shown in Figure 6(b). Apparently, the output voltage ripple on this condition is

By using equations (21)–(23), the output voltage ripple of the DCPT-controlled buck converter can be calculated, as listed in Table 3. For the DCPT-controlled buck converter, the output voltage ripple increases gradually with the increase of the input voltage.

#### 4. Simulation and Experimental Results

##### 4.1. Simulation Results

To verify the theoretical analysis, the simulation results are provided in Figure 7, which include carrier signal , control pulse , capacitor current *i*_{c,} and output voltage .

**(a)**

**(b)**

**(c)**

**(d)**

As shown in Figure 7(a), when the input voltage equals to 8.68 V, the pulse train is 2*P*_{H}-1*P*_{L}, the pulse ratio is *μ*_{H}/*μ*_{L} = 2, and the output voltage ripple is 40 mV, which are consistent with the theoretical analysis. Similarly, as shown in Figures 7(b)–7(d), when the input voltage equals to 9.2 V, 10.83 V, or 12 V, the pulse train is 1*P*_{H}-1*P*_{L}, 1*P*_{H}-3*P*_{L}, or 1*P*_{H}-5*P*_{L}, the pulse ratio is 1, 1/3, or 1/5, and the output voltage ripple is 40 mV, 55 mV, or 60 mV, respectively.

According to Figure 7, the following conclusion of the DCPT-controlled buck converter can be obtained: as the input voltage *V*_{in} increases, *μ*_{H}/*μ*_{L} decreases gradually, i.e., the proportion of *P*_{H} in the pulse train decreases, which is consistent with the theoretical analysis in Section 3.2.

In addition, the value of the capacitor current at the beginning of each switching cycle is equal to the preset valley current *I*_{v} due to the traction of the carrier signals. Since the capacitor current reflects the ripple of the inductor current, the value of the inductor current is constant at the beginning of each switching cycle. Therefore, the variation of the output voltage is only influenced by the control pulse *P*_{H} or *P*_{L}, which indicates that the low-frequency oscillation does not exist in the DCPT-controlled buck converter.

##### 4.2. Experimental Results

In order to verify and test the proposed technique, a prototype of the DCPT-controlled buck converter is designed with the parameters in Table 1. In the prototype, the control scheme is achieved by an FPGA device, with a type of EP4CE15F17C8. An operational amplifier OPA228 and a 10 mΩ sense resistor connected with the output capacitor are employed to obtain the capacitor current. Two D/A DAC0808 converters are applied to generate the carrier signals, and an analogue multiplexer CD4051 is used to select the carrier signal between and . Besides, the type of the comparators in this prototype is LM393.

When the input voltage equals to 8.68 V, the experimental waveforms are shown in Figure 8(a). The pulse train is 2*P*_{H}-1*P*_{L}, and the output voltage ripple is 40 mV approximately. Similarly, when the input voltage equals to 9.2 V, 10.83 V, or 12 V, the pulse train is 1*P*_{H}-1*P*_{L}, 1*P*_{H}-3*P*_{L}, or 1*P*_{H}-5*P*_{L} and the output voltage ripple is 40 mV, 50 mV, or 60 mV, respectively.

**(a)**

**(b)**

**(c)**

**(d)**

According to the principle of DCPT control, the control pulse is generated by comparing the capacitor current with the carrier signals. It can be seen from Figure 8 that the combination of the carrier signals changes with the variation of the input voltage, which causes the variation of the pulse train. Based on the experimental results, it can be known that the DCPT-controlled buck converter can operate in a steady state by adjusting the pulse train when the input voltage changes.

In order to study the transient response of the DCPT control method, the experimental transient waveforms are provided in Figure 9. When the load current increases from 2A to 3A, two high-energy pulses are generated successively by the controller to stabilize the output voltage, and this converter enjoys excellent transient response. Considering the parasitic parameters such as the on-state resistor of the MOSFET, when the load current increases, the input voltage of the inductor will decrease slightly, which causes the proportion of *P*_{H} in the pulse train to increase.

In order to verify the suppression effect on the low-frequency oscillation, the comparative experimental results are provided in Figure 10. The control parameters of traditional PT-controlled buck converter are as follows: *D*_{H} = 0.6, *D*_{L} = 0.3, and *T* = 25 *μ*s.

**(a)**

**(b)**

As shown in Figure 10(a), the pulse train is 1*P*_{H}-5*P*_{L} for the DCPT-controlled CCM converter and the output voltage ripple is 60 mV. In contrast, the pulse train of the PT-controlled buck converter is 4*P*_{H}-4*P*_{L}, and the output voltage ripple is 120 mV, as shown in Figure 10(b). This phenomenon of successive several high-energy pulses followed by successive several low-energy pulses indicates that the low-frequency oscillation exists in the PT-controlled CCM converter. The low-frequency oscillation has not occurred in the DCPT-controlled CCM buck converter. The proposed DCPT control technique enjoys much better output characteristics compared with the traditional PT control technique.

#### 5. Conclusions

In this paper, a dual-carrier pulse-train control technique is proposed. With the CCM buck converter as an example, the operational principle is analysed in detail. Based on the output voltage variation of the DCPT-controlled buck converter within one switching cycle, the pulse control law and the output voltage ripple are analysed. The simulation and experimental results verify the theoretical analysis and indicate that there is no low-frequency oscillation in the DCPT-controlled CCM buck converter. Compared with the traditional PT control technique, the DCPT-controlled buck converter enjoys better control characteristics and much smaller output voltage ripple.

#### Data Availability

The data used to support the findings of this study are included within the article.

#### Conflicts of Interest

The authors declare that there are no conflicts of interest regarding the publication of this paper.

#### Acknowledgments

This work was supported by the National Natural Science Foundation of China (51507155) and the Key Research Program of He’nan Higher Education (16A470014).