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Journal of Engineering
Volume 2013, Article ID 759761, 8 pages
http://dx.doi.org/10.1155/2013/759761
Research Article

A VLSI Implementation of Rank-Order Searching Circuit Employing a Time-Domain Technique

1Faculty of Electronics and Telecommunications, University of Science, VNU-HCM, Ho Chi Minh City, Vietnam
2Department of Electrical Engineering and Information Systems, The University of Tokyo, Tokyo 113-8656, Japan

Received 28 August 2012; Revised 3 December 2012; Accepted 11 December 2012

Academic Editor: Jan Van der Spiegel

Copyright © 2013 Trong-Tu Bui and Tadashi Shibata. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

We present a compact and low-power rank-order searching (ROS) circuit that can be used for building associative memories and rank-order filters (ROFs) by employing time-domain computation and floating-gate MOS techniques. The architecture inherits the accuracy and programmability of digital implementations as well as the compactness and low-power consumption of analog ones. We aim to implement identification function as the first priority objective. Filtering function would be implemented once the location identification function has been carried out. The prototype circuit was designed and fabricated in a 0.18 μm CMOS technology. It consumes only 132.3 μW for an eight-input demonstration case.