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Research Letters in Signal Processing
Volume 2007, Article ID 53296, 3 pages
http://dx.doi.org/10.1155/2007/53296
Research Letter

Realization of IIR Decimation Filters Based on Merged Delay Transformation

1Department of Electrical Engineering, University of Engineering and Technology, Taxila, Pakistan
2Department of Computer Engineering, Center for Advance Studies in Engineering, Islamabad, Pakistan

Received 26 July 2007; Accepted 16 October 2007

Academic Editor: C. Chung Ko

Copyright © 2007 Umar Farooq et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

A novel realization of IIR decimation filters is proposed which is based on merged delay transformation. The transformation is derived analytically and can be applied directly to first- and second-order IIR filters. Computational efficiency is enhanced because the current output can be directly computed from Mth old output. The output data rate is decreased by M by merging M number of delay elements in the recursive path. The proposed transformation is applied to higher-order IIR filter by decomposing it into parallel first-order and second-order sections. This transformation not only gives better stability for coefficient quantization but also reduces the requirement on processing clock, for sample, rate reduction. Filtering and down sampling are performed in the same stage. Number of multiplications is reduced by 45% as compared to the conventional IIR filters where all output samples are computed.