Design Considerations for Autocalibrations of Wide-Band <svg style="vertical-align:-0.0pt;width:27.9px;" id="M1" height="15.025" version="1.1" viewBox="0 0 27.9 15.025" width="27.9" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns="http://www.w3.org/2000/svg"><g transform="matrix(.022,-0,0,-.022,.062,14.975)"><path id="x394" d="M600 0h-557v24l268 633l28 8l261 -641v-24zM497 50l-194 489l-196 -489h390z" /></g><g transform="matrix(.022,-0,0,-.022,14.431,14.975)"><path id="x3A3" d="M570 168l-39 -168h-498v23l262 301l-248 304v22h471q4 -71 11 -146l-29 -4q-17 65 -37 88q-12 15 -36 20.5t-79 5.5h-181l211 -256l-243 -287h280q51 0 77 20.5t49 83.5z" /></g></svg> Fractional-<svg style="vertical-align:-0.144pt;width:19.7125px;" id="M2" height="14.875" version="1.1" viewBox="0 0 19.7125 14.875" width="19.7125" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns="http://www.w3.org/2000/svg"><g transform="matrix(.022,-0,0,-.022,.062,14.638)"><path id="x1D441" d="M857 650l-6 -28q-44 -4 -61.5 -16.5t-29.5 -48.5q-11 -32 -37 -166l-78 -399h-29l-351 537h-4l-56 -276q-24 -120 -24 -164q0 -35 17.5 -46t75.5 -15l-6 -28h-245l7 28q41 2 62 14t31 44q10 30 41 171l53 245q8 44 6.5 60.5t-14.5 33.5q-10 15 -27 19.5t-64 6.5l6 28h153
l350 -516h5l48 257q25 131 25 171q0 34 -17.5 45t-77.5 15l7 28h240z" /></g></svg> PLL Synthesizers

<table>Loop gain compensation by preset pattern of charge pump gain <svg height="15.4375" id="M99" style="vertical-align:-3.41936pt" version="1.1" viewbox="0 0 22.7875 15.4375" width="22.7875" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink">
<g transform="matrix(.017,-0,0,-.017,.062,11.112)"><path d="M414 650l-6 -28q-63 -4 -78.5 -17.5t-27.5 -71.5l-77 -416q-11 -58 0.5 -71.5t77.5 -17.5l-5 -28h-275l8 28q63 4 79.5 18.5t27.5 70.5l80 416q11 57 -2 71t-81 18l6 28h273z" id="x1D43C"></path></g>
<g transform="matrix(.012,-0,0,-.012,7.487,15.187)"><path d="M614 175l29 -10q-33 -109 -57 -154q-121 -26 -184 -26q-90 0 -160.5 29t-112.5 77t-63.5 105.5t-21.5 119.5q0 157 108 253t277 96q36 0 71.5 -5t69 -13.5t36.5 -8.5q15 -102 20 -150l-29 -8q-20 79 -66.5 114t-128.5 35q-119 0 -187.5 -86t-68.5 -207
q0 -140 73.5 -227.5t188.5 -87.5q73 0 119.5 37.5t86.5 116.5z" id="x43"></path></g><g transform="matrix(.012,-0,0,-.012,15.4,15.187)"><path d="M46 650h247q112 0 169 -41q64 -49 64 -141q0 -91 -56.5 -143t-138.5 -62q-23 -3 -45 -1l-74 19v-157q0 -63 15.5 -77t83.5 -19v-28h-271v28q60 5 74 20t14 77v400q0 65 -12.5 79t-69.5 18v28zM212 559v-245q31 -12 73 -12q59 0 102 38t43 124q0 77 -42.5 115.5
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</svg>. (a) Architecture. (b) Operation principle [<a href="/journals/jece/2011/139183/#B14">13</a>].</table>

Journal of Electrical and Computer Engineering

fig8

Figure 8

Figure 8: Design Considerations for Autocalibrations of Wide-Band <svg style="vertical-align:-0.0pt;width:27.9px;" id="M1" height="15.025" version="1.1" viewBox="0 0 27.9 15.025" width="27.9" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns="http://www.w3.org/2000/svg"><g transform="matrix(.022,-0,0,-.022,.062,14.975)"><path id="x394" d="M600 0h-557v24l268 633l28 8l261 -641v-24zM497 50l-194 489l-196 -489h390z" /></g><g transform="matrix(.022,-0,0,-.022,14.431,14.975)"><path id="x3A3" d="M570 168l-39 -168h-498v23l262 301l-248 304v22h471q4 -71 11 -146l-29 -4q-17 65 -37 88q-12 15 -36 20.5t-79 5.5h-181l211 -256l-243 -287h280q51 0 77 20.5t49 83.5z" /></g></svg> Fractional-<svg style="vertical-align:-0.144pt;width:19.7125px;" id="M2" height="14.875" version="1.1" viewBox="0 0 19.7125 14.875" width="19.7125" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns="http://www.w3.org/2000/svg"><g transform="matrix(.022,-0,0,-.022,.062,14.638)"><path id="x1D441" d="M857 650l-6 -28q-44 -4 -61.5 -16.5t-29.5 -48.5q-11 -32 -37 -166l-78 -399h-29l-351 537h-4l-56 -276q-24 -120 -24 -164q0 -35 17.5 -46t75.5 -15l-6 -28h-245l7 28q41 2 62 14t31 44q10 30 41 171l53 245q8 44 6.5 60.5t-14.5 33.5q-10 15 -27 19.5t-64 6.5l6 28h153
l350 -516h5l48 257q25 131 25 171q0 34 -17.5 45t-77.5 15l7 28h240z" /></g></svg> PLL Synthesizers 

Journal of Electrical and Computer Engineering

Design Considerations for Autocalibrations of Wide-Band Fractional- PLL Synthesizers

Figure 8