This paper analyzes the code tracking performance in the presence of signal blanking in Global Navigation Satellite System (GNSS). The blanking effect is usually caused by buildings that obscure the signal in either a periodic or random manner. In some cases, ideal blanking is used to remove random or periodic interference. Nevertheless, the effect of temporary discontinuity of signal often leads to the tracking and position error. To analyze this problem, three types of blanking model are considered: no blanking, periodic blanking, and random blanking of the signals input into the code tracking loop. The mean time to lose lock (MTLL) is to assess the performance of code tracking system under signal blanking. Finally, the effect of steady-state tracking errors on the performance of tracking loop resulting from blanking environment is also discussed.

1. Introduction

The Global Navigation Satellite System (GNSS) provides information of position, velocity, and time by means of spread spectrum techniques [1, 2]. An essential way to predict the performance of GNSS system is the ability of the code tracking loop to maintain “lock”. When the signal is blanked, most of the GNSS positioning methods suffer from degradation in accuracy and increase in the receiver processing time [3]. The blanking effect is usually caused by buildings, wall, trees, rotation of vehicle, or random manners that obscure the signal periodically [4]. Besides the above factors, solar radio bursts caused by sunspots also cause the receiver to receive blank signal for a long time [5]. Of course, the use of ideal blanking method can mitigate the effect of pulse interference on positioning performance of receiver [6, 7]. With regards to the improvement methods for blanking effect, studies in early research only determine and deal with the phenomenon prior to signal correlation [8]. When the signal suffers from blanking effect, literature review on the postprocessing of code tracking is relatively few.

In this paper, the performance of code tracking loop in the presence of noise and blanking is assessed. The code tracking loop considered here is a second-order delay lock loop (DLL) with an early-late gating of 1/2 chip. Three blanking models are presented: no-blanking, periodic blanking, and random blanking. The effect of random blanking on the loops is more emphasized because two blanks may appear contiguously, which causes the loops to be without signal for a longer time. It inevitably influences the signal tracking performance. Therefore, the mean time to lose lock (MTLL) is shown to evaluate the performance of code tracking loop under the presence of signal blanking.

The remainder of this paper is organized as follows: Section 2 gives a description of signal blanking model and the diagram of code tracking loop. In Section 3, the comparison of loop performance is discussed. Then, survey of code tracking technique is also presented in this section. At last, a brief summary concludes in Section 4.

2. Problem Formulation

2.1. Signal Model and System Description

The major goal of this paper is to analyze the blanking effect on the performance of code tracking loop. The Doppler uncertainties and data modulation are ignored. Based on these assumptions, the received mathematical model in the baseband is given by where is the incoming signal power, is the filtered maximum length pseudorandom noise (PRN) code sequence with a delay of seconds and chip period of seconds, is the signal frequency, and is the phase of direct signal. is low-pass filtered noise components that are independent, zero mean with power spectral density . The blanking model is used to interrupt the signal so that the receiver is unable to receive consistent signal. The purpose of code tracking is to perform and maintain fine synchronization. A common fine synchronization strategy is to depict a code tracking loop which can track the code delay in the presence of a small frequency error. After the correct code phase is acquired by the code tracking loop, a phase locked loop (PLL) can be used to track the carrier frequency and phase.

Figure 1(a) demonstrates the coherent DLL (c-DLL) model for code phase measurement. The coarse/acquire (C/A) signal is generated and controlled by a blanking switch that can randomly or periodically “blank” the signal. The blanked signal combines white Gaussian noise and then is fed into the delay locked loop. Suppose perfect carrier demodulation is employed in the system. The error of discriminator output is then passed through the loop filter and the output is fed to the digital controlled oscillator (DCO) that steers the clock of the local PRN code generator. It is designed not only to reduce the tracking error but also to produce an accurate estimate of the original signal at its output. The model for the noncoherent DLL (nc-DLL) is shown in Figure 1(b), except for each low pass filter (LPF) followed by a square-law envelope detector. The difference between the choice of an nc-DLL or a c-DLL depends on whether the carrier frequency and phase are known or not. If both of them are known a priori, the c-DLL can be adopted. When neither of them is known, the nc-DLL must be employed to track the received signal.

2.2. Blanking Model

The defined process in (1) is a collection or ensemble of time waveforms that change from 1 to 0, or from 0 to 1, or remain the same at possible transition time point that is equally spaced a distance apart along the time axis. It is worth noting that when for all , the receiver simply receives noise term. Suppose that the no blanking model is given by

The second is periodic blanking model that is modeled to have a ms duration in a period of ms for a duty cycle of and is described on each subinterval for th period of the time axis depicted as follows: where is the total times of blanking period.

The last model is random blanking. A source generates a sequence of two symbols, say and (blanking is “”; without blanking is “”). The and can denote the outcome of flipping an honest coin. Assume that the probability of getting a head on a single trial is and that tosses at different times are independent. The sample space consists of all possible double infinite sequences of heads and tails: Suppose there are segments among fixed time and each segment equals second. The random blanking process, , using 0 and 1 as values, is described on each subinterval of the time axis as: where is the total blanking times. It is impossible for us to write a single expression in terms of random variables for the process. Nevertheless, it is possible to characterize the process by specifying certain statistical properties. The coin assumption shows that the probability of getting either a head or a tail (1 or 0 for the process during each interval) is . Therefore, the mean, , of the process can be found directly from the first-order density by [9] Suppose times of blanking take place within times, the probability of blanking is and no-blanking probability is . The mean value can be calculated using (6). Figure 2 shows the no-blanking, periodic blanking, and random blanking model.

3. Performance Analysis

3.1. Coherent DLL

This section evaluates the effect of blanking on the performance of code tracking loop. The loop stabilizes when the discriminator output maintains zero. A c-DLL attempts to nullify the discriminator output by adjusting the estimated code delay. The outputs of correlators (including early correlator and late correlator ) are given by correlation between the incoming baseband signal and the locally generated replica in which is the locally generated spreading code, is the estimation phase, is the chip spacing between the late and early correlators, is the chip time, and is estimation values of code delay . The correlated signal with early and late correlators can be approximated as follows: where and are total noise components, denotes autocorrelation function of the PRN sequence and is defined as follows: when the phase of the replica resembles the original function (), the maximum correlation is derived. Assume the frequency of local replica to be the same as that of the incoming signal, the correlation loss owing to frequency error, which is a “sinc” function, is not considered in (7). Suppose the value of is zero at baseband, the error signal can be described by where is the loop noise with density (one-sided bandwidth) and is the code delay error of the loop. is the discriminator function and is given by Under the assumption of wide front-end bandwidth, and the estimated phase error , the normalized slope is defined by Then the error signal is expressed as An approximation to the effect of blanking can be obtained by looking at the average power after blanking. Assume that the inverse blanking duration is much greater than the loop bandwidth, (12) can be modified as where can be considered as the average power reduction factor owing to blanking effect.

Figure 3 depicts the block diagram of the linearized code tracking loop in which is the s-transform operator of the DCO, is the transfer function of loop filter, and is the sensitivity of the discriminator. The closed-loop transfer function is

For the second order, the . Where and are constant which are related to natural frequency, damping ratio, and closed loop equivalent noise bandwidth. In simulation system, second-order DLL is adopted to assess the performance of tracking system.

In particular, let be the equivalent noise bandwidth: the variance on code delay error estimation due to noise in the closed-loop operation is shown as follows: where represents the power spectral density of noise , denotes the ensemble average operator, and the noise density (after low-pass filtering to smooth the transients) has a value at low frequency of . Thus, the variance of noise in the delay error can be expressed as where is the carrier to noise density ratio.

3.2. Noncoherent DLL

The nc-DLL simply adds a square-law envelope detector after the low-pass filter in Figure 1(b). Similar formulations can also be made for the noncoherent case. Based on this premise, the error signal driving the loop filter is given by where is the discriminator function for nc-DLL case. The definitions of and are the same as those in (9) and (12), except for the slight difference of nc-DLL scenario discussed here. For the linearized discriminator gain is expressed as The variance of noise can be described as follows: For the numerical simulations, the error signal given in (17) is normalized to the input noise power . Thus, the normalized signal power and loop noise are described by Therefore, the normalized error signal can be expressed in the form of Substituting (18) into (21), the error signal can be expressed as Finally, the closed-loop transfer function is given by The noise variance in the delay error can be computed and is shown as follows: Now approximate with and assume that the noise spectral density is essentially flat across the loop bandwidth [10]. Thus (24) can be modified as

3.3. Factor

When the time delay estimation error is small, and the phase can be correctly estimated, the variance of code delay error due to noise in the closed-loop operation is obtained which uses (16) and (25). However, the value influences the tracking performance in the whole loop. The value is set as one under no-blanking. Under the model of periodic blanking, the value of duty cycle affects the reception duration of desired signals. That is, the larger the duty cycle, the higher probability the tracking loop may lose lock of the signals and also the larger the variance of error. This is because the correlation loss caused by signal discontinuity leads to the reduction of reception power during correlation process [4]. Thus, in the case of periodic blanking, the reduction factor for c-DLL is depicted as . In addition, regarding random blanking case, is set as . Substitute into (16) to find the variance of code delay error, which is given by With respect to nc-DLL case, given that , the variance of code delay error owing to noise in the close loop operation can be given by (25). Similarly, blanking also affects tracking performance in nc-DLL. Thus, substitute into (25) to find the variance of code delay error, which is expressed as

4. Numerical Results

4.1. Simulation Procedure

To effectively verify the effect of different blanking scenarios on the performance of code tracking loop, this chapter establishes a simulation system and presents results for the delay lock loop. The simulations are conducted using Matlab software. The following will describe the simulation procedure.

(1) Firstly, one digital IF data with desired signal is generated under the scenario of no-blanking effect and synchronized frequency shift. This data is then input to c-DLL and nc-DLL, respectively, to proceed with code tracking and estimate the carrier to noise density ratio () as well as a stable estimate of code delay error variance.

(2) The duty cycle of periodic blanking and probability of random blanking are set, respectively; both of which conduct blanking with previous digital IF data. The data after the process of blanking is then input to c-DLL and nc-DLL to estimate and stable estimate of code delay error variance.

(3) Digital IF data with different power of satellite signals is generated, respectively. The procedures of (1) and (2) are repeated to analyze the variance of code delay error under the blanking with different .

(4) Simulation of the relation between MTLL and different blanking models.

Through the above simulation process, we can accurately analyze the standard derivation of the code phase error and loss of lock under different blanking scenarios.

4.2. MTLL Computation

MTLL is utilized to assess the performance of code tracking system and it also characterizes the mean time that the DLL stays in its tracking range ( chip spacing) [11, 12]. One model for the MTLL is derived through solving the Fokker-Planck equation. The MTLL, , for the first-order DLL with chip spacing is obtained as depicted in the following: where and denote variance of code delay error and delay error, respectively. is the integral of the discriminator function , which is an even function of . Substituting the variance of code delay error in (26), (27), respectively, into (28), the value under different scenarios of blanking is derived. Equation (27) is applicable to first-order and second-order DLL. In fact, the result of (27) is valid for any closed loop, with a discriminator function given by . According to Holmes, the MTLL for the second-order DLL can be derived from (28) by decreasing by 1 dB [13].

4.3. Performance Analysis

In all simulations, assume the reception time of digital IF data is 30 seconds, the noise bandwidth of c-DLL and nc-DLL is  Hz, respectively, the integration time is 2 ms, and the signal blanking time is 20 ms every unit. Generally, the smaller the , the longer the computation time to lock code phase shift in code tracking loop. On the contrary, the larger the , the larger the error of code phase. Typically, the value is set between 0.1 Hz and 10 Hz. Suppose that in periodic blanking, the duty cycle is 5% (every 400 ms) and the probability of random blanking is also 0.05. The major reason for such a sameness is to analyze the effect of the two blanking models on the performance of code tracking loop. Both analytical and simulation results are demonstrated in Figure 4. The analytical result for the c-DLL and nc-DLL under blanking is computed via the formula (6)–(26) in Section 3. In contrast, the simulation results are derived by averaging a series of 50 Monte Carlo closed-loop simulation results. When the front-end bandwidth is fixed, the tracking error is controlled, mainly, by the correlator spacing for an early minus late discriminator.

Figure 4(a) illustrates the duration of duty cycle in periodic blanking versus the result of tracking error under the scenario of = 14 dB-Hz. The threshold is set to chips for chip case. The time for one sample of the delay error to exceed this threshold is the time to lose lock, since at either of these points, the tracking error S-curves essentially goes to zero.

The figure presents that when the duty cycle is above 15% (blanking time as 300 ms, duty cycle as 2000 ms), the tracking loop loses lock. Figure 4(b) demonstrates the relation between the probability of random blanking and the result of tracking error. It is shown that when the blanking probability is above 0.085, the loop loses lock (blanking time is 20 ms every unit).

Figure 5 indicates that MTLL is computed by averaging the time to lose lock in all 50 runs for different blanking cases with  Hz, and  ms, over a range of . In Figure 5(a), it is observed that nc-DLL with random blanking drops to lose lock slightly earlier than the periodic and the no-blanking case. The same result is shown in Figure 5(b). Figure 6 illustrates and compares the standard deviation of tracking error (in the unit of chip) under the scenario of different blanking effects and two DLL structures. It can also be observed that under the scenario of lower , random blanking has greater influence on the performance of two models of DLL than periodic blanking. In the case of higher ( dB-Hz), the effects of periodic blanking and random blanking are pretty close. The results show a little degradation in code tracking performance under the small probability of random blanking and small duty cycle of periodic blanking. When the probability of random blanking is above 0.085 and the duty cycle of periodic blanking is above 15%, the signal loses lock.

5. Conclusion

The effect of blanking on the performance of c-DLL and nc-DLL has been presented in previous sections. The performance evaluation is the standard deviation of the phase error and loss of lock. Numerous blanking values are simulated. The effect of blanking in c-DLL degrades the receiver power by . Assume the duty cycle of blanking is smaller than inverse tracking loop bandwidth, the received power degradation is slightly proportional to the duty factor of blanking in the case of periodic blanking under the scenario of nc-DLL. Under the same prerequisite for random and periodic blanking, the simulation results show that the random blanking degrades the DLLs (c-DLL and nc-DLL) performance more severely than the other blanking cases. In addition, the effect of ideal periodic blanking on the performance of tracking loop serves as the reference for the future use of ideal blanking to mitigate pulse interference.


Many thanks are due to editor and reviewers for their precious comments to improve the content of this paper. In addition, the author would like to thank the mechatronics laboratory, National Cheng Kung University for providing expensive instruments to conduct simulation and experiment tests and National Science Council in Taiwan for supporting this research under Grant NSC 99-2221-E-020-036.