Research Article

Parametric Yield-Driven Resource Binding in High-Level Synthesis with Multi-Vth/Vdd Library and Device Sizing

Figure 6

Timing yield computation in multi- 𝑉 d d high-level synthesis with different level conversions. Shadowed operations are bound to function units with low-supply voltages, and the bars indicate the insertion of level converters.
105250.fig.006a
(a) No level conversion
105250.fig.006b
(b) synchronous conversion
105250.fig.006c
(c) synchronous conversion