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Journal of Electrical and Computer Engineering
Volume 2012 (2012), Article ID 537286, 12 pages
http://dx.doi.org/10.1155/2012/537286
Research Article

A Buffer-Sizing Algorithm for Network-on-Chips with Multiple Voltage-Frequency Islands

1Indian Institute of Technology Madras, Chennai 600036, India
2iNoCs, 1007 Lausanne, Switzerland
3University of Bologna, 40138 Bologna, Italy
4EPFL, 1015 Lausanne, Switzerland

Received 17 July 2011; Accepted 1 November 2011

Academic Editor: An-Yeu Andy Wu

Copyright © 2012 Anish S. Kumar et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

Anish S. Kumar, M. Pawan Kumar, Srinivasan Murali, V. Kamakoti, Luca Benini, and Giovanni De Micheli, “A Buffer-Sizing Algorithm for Network-on-Chips with Multiple Voltage-Frequency Islands,” Journal of Electrical and Computer Engineering, vol. 2012, Article ID 537286, 12 pages, 2012. doi:10.1155/2012/537286