Journal of Electrical and Computer Engineering / 2012 / Article / Tab 4

Research Article

A State-Based Modeling Approach for Efficient Performance Evaluation of Embedded System Architectures at Transaction Level

Table 4

Time constraints applied for each activity according to architectures.


I0,2* T C 𝑃 1 0,12* T C 𝑃 1 0,04* T C 𝑃 1 0,08* T C 𝑃 1
II71428 ns14285 ns14285 ns7142 ns

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