Task-Level Data Model for Hardware Synthesis Based on Concurrent Collections

Listing 21

TLDM specification of indirect access.

tldm_data array_A(“A”);

// accesses A[idx[j] ][i] // implication: x<= idx[x] < x+M

tldm_access indirect_acc(&array_A, READ);

indirect_acc.insert_affine_constraint(“A(0)”, 1, “j”, -1, “>=”, 0); // A₀ >= j

indirect_acc.insert_affine_constraint(“A(0)”, 1, “j”, -1, “M”, -1, “<”, 0); // A₀ < j+M

indirect_acc.insert_affine_constraint (“A(1)”, 1, “ i”, -1, “=”, 0); // A₁ = i

[A : j..(j+M), i] -> (task2 : i, j)