Journal of Electrical and Computer Engineering / 2012 / Article / Fig 10

Research Article

Self-Calibrated Energy-Efficient and Reliable Channels for On-Chip Interconnection Networks

Figure 10

The block diagrams of self-calibrated voltage scaling technique with crosstalk-aware test error detection stage and run-time error detection stage.
697039.fig.0010

We are committed to sharing findings related to COVID-19 as quickly and safely as possible. Any author submitting a COVID-19 paper should notify us at help@hindawi.com to ensure their research is fast-tracked and made available on a preprint server as soon as possible. We will be providing unlimited waivers of publication charges for accepted articles related to COVID-19. Sign up here as a reviewer to help fast-track new submissions.