Journal of Electrical and Computer Engineering / 2012 / Article / Fig 19

Research Article

Self-Calibrated Energy-Efficient and Reliable Channels for On-Chip Interconnection Networks

Figure 19

The data path delay ( 𝑡 𝑑 ) distributions of rising speedup, falling speedup, rising delay, falling delay, normal rising, and normal falling cases under (a) high voltage (1.0 V), (b) medium voltage (0.85 V) and (c) low voltage (0.7 V).
697039.fig.0019a
(a)
697039.fig.0019b
(b)
697039.fig.0019c
(c)

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