A Power-Efficient Soft-Output Detector for Spatial-Multiplexing MIMO Communications

Table 4

ASIC Summary of The Proposed MIMO Detector.

ASIC specification
Technology	TSMC 0.18 μm 1P6M CMOS
Supply voltage	1.8 V
Power consumption	64-QAM	195.8 mW at 120 MHz
	16-QAM	145.5 mW at 120 MHz
Maximum throughput	64-QAM	45 Mbps at 120 MHz
	16-QAM	120 Mbps
	QPSK	60 Mbps
Maximum clock frequency	120 MHz
Core area	1.16928×1.17414 (mm^2)