Research Article
Ultra-Low Leakage Arithmetic Circuits Using Symmetric and Asymmetric FinFETs
Table 14
Comparison between different scenarios of 4 : 2 symmetric FinFET compressor.
| | Scenario | (pA) | (ps) | Static power * delay (zJ) | Number of transistors |
| | 1 | 149.93 | 48.68 | 8.75 | 60 | | 2 | 186.45 | 37.18 | 8.31 | 44 | | 3 | 119.77 | 32.99 | 4.74 | 36 |
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