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Journal of Electrical and Computer Engineering
Volume 2013, Article ID 587108, 10 pages
Research Article

A Low-Complexity Decision Feedforward Equalizer Architecture for High-Speed Receivers on Highly Dispersive Channels

1Laboratorio de Comunicaciones Digitales, Universidad Nacional de Córdoba, CONICET, Avenida Vélez Sarsfield 1611, Córdoba X5016GCA, Argentina
2Universidad Nacional del Sur, IIIE, CONICET, Avenida Alem 1253, Bahía Blanca B8000CPB, Argentina
3ClariPhy Communications, Inc., 7585 Irvine Center Drive, Suite 100, Irvine, CA 92618, USA

Received 10 December 2012; Revised 14 February 2013; Accepted 18 February 2013

Academic Editor: Antonio G. M. Strollo

Copyright © 2013 Ariel L. Pola et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


This paper presents an improved decision feedforward equalizer (DFFE) for high speed receivers in the presence of highly dispersive channels. This decision-aided equalizer technique has been recently proposed for multigigabit communication receivers, where the use of parallel processing is mandatory. Well-known parallel architectures for the typical decision feedback equalizer (DFE) have a complexity that grows exponentially with the channel memory. Instead, the new DFFE avoids that exponential increase in complexity by using tentative decisions to cancel iteratively the intersymbol interference (ISI). Here, we demostrate that the DFFE not only allows to obtain a similar performance to the typical DFE but it also reduces the compelxity in channels with large memory. Additionally, we propose a theoretical approximation for the error probability in each iteration. In fact, when the number of iteration increases, the error probability in the DFFE tends to approach the DFE. These benefits make the DFFE an excellent choice for the next generation of high-speed receivers.