Research Article

Programmed Tool for Quantifying Reliability and Its Application in Designing Circuit Systems

Table 2

Reliability measures, time execution, and storage complexity for standard benchmark test circuits with .

Test circuitNumber of faulty gatesModelReliabilityTime (s)Storage (bytes)

Full adder5PGM0.78794.461962
BDEC0.78750.61802
PTM0.79976.56173872
BN0.88693.33108654

2–4 decoder6PGM0.73971.551836
BDEC0.74050.691260
PTM0.756641.381201826
BN0.91666.18131642

C176PGM0.76219.107088
BDEC0.76340.551096
PTM0.78396.27142102
BN0.88163.13139456

NAND based full adder12PGM0.59334.163348
BDEC0.63260.882188
PTM0.660511.33327268
BN0.78094.13227444

Majority gates based full adder28PGM0.57678.279460
BDEC0.62741.948300
PTMStorage complexity increases result in “busy” mode
BN0.75607.55594548