A 3.9 μs Settling-Time Fractional Spread-Spectrum Clock Generator Using a Dual-Charge-Pump Control Technique for Serial-ATA Applications

Figure 19

Measurement result of the proposed SSCG settling-period. The sample is SS. Measurement condition is 1.35 V/125°C. Without proposed fast-lock dual-CP function (a), settling-period could be less than 8.11 ms. With function (b), settling-period could be less than 3.91 μs. (c) and (d) are same PLL parameter as Figure 9. Without function (c), measurement and simulation settling period are 24.8 μs and 22.5 μs, respectively. With function (d), measurement and simulation settling period are 19.4 μs and 18.2 μs, respectively.

(a) Without

(b) With

(c) Without

(d) With