A 3.9 μs Settling-Time Fractional Spread-Spectrum Clock Generator Using a Dual-Charge-Pump Control Technique for Serial-ATA Applications

Figure 7

The effect of the loop bandwidth and phase margin due to CP parameters. (a) The effect by different current (). (b) The effect by CPM (). (c) The effect by CPS ().

(a)

(b)

(c)