Modelling and Automated Implementation of Optimal Power Saving Strategies in Coarse-Grained Reconfigurable Architectures

Table 6

FFT use case: logic regions architectural and functional characteristics.

	0.33	0.67	0.37	0.04	0.21	0.42	0.58	0.96
	1024	1112	512	2324	1948	1756	256	5259
	1024	518	256	0	0	0	128	512
	1024	518	256	0	0	0	128	512
	1024	1032	512	2306	1926	1740	256	4934