Research Article
Design of Low-Power Structural FIR Filter Using Data-Driven Clock Gating and Multibit Flip-Flops
Table 7
Comparison of power reduction of the proposed filter with previous works.
| | | Filter description | Technology (μm) | Total power | MSE (dB) |
| | Reference [5] | 75 taps (16 × 16) | 0.25 | 423 mW at 100 MHz | −45.91 (−49.98) | | Reference [32] | 48 taps (16 × 12) | 0.25 | 0.28 mW at 44.1 kHz | — | | Our work | 75 taps | 0.25 | 388 mW at 100 MHz | −85.68 |
|
|
