Journal of Electrical and Computer Engineering

ESL Design Methodology


Publishing date
01 Mar 2012
Status
Published
Submission deadline
01 Sep 2011

Lead Editor

1University of Illinois at Urbana-Champaign, Champaign, IL 61820-5711, USA

2Seoul National University, Seoul, Republic of Korea

3Lab-STICC, Université de Bretagne-Sud, Lorient, France

4State University, University Park, State College, PA, USA

5Xilinx Inc., San Jose, CA 95124, USA


ESL Design Methodology

Description

ESL (electronic system-level) design is an emerging design methodology that allows designers to work at higher levels of abstraction than typically supported by register transfer level (RTL) descriptions. Its growth has been driven by the continuing complexity of IC design, the shortening time to market, and growing number of design constraints and objectives, which have made RTL implementation less efficient.

ESL methodology holds the promise of dramatically improving design productivity by accepting designs written in high-level languages such as C, SystemC, C++, and MATLAB, and implementing the function straight into hardware. Designers can also leverage ESL to optimize performance and power by converting compute intensive functions into customized cores in SoC designs or FPGAs. It can also support early embedded software development, architectural modeling, and functional verification.

ESL has been predicted to grow in both user base and revenue steadily in the coming decade. Meanwhile, the design challenges in ESL remain. Some important research challenges include effective hardware/software partitioning and codesign, high-quality high-level synthesis, seamless system IP integration, accurate and fast performance/power modeling, and efficient debugging and verification. Potential topics include, but are not limited to:

  • New algorithmic development for high-level synthesis
  • Domain-specific high-level synthesis (DSP, processor-based, control-intensive, etc.)
  • High-level synthesis for emerging technologies (3D, biochips, nanoscale circuits, etc.)
  • Extensible/reconfigurable processor synthesis
  • ESL design space exploration
  • Virtual prototyping
  • Transaction Level Modeling
  • Hardware/software partitioning and codesign
  • Hardware/software interaction and interface
  • ESL-to-RTL verification
  • ESL debugging
  • ESL power/performance analysis
  • ESL-IP integration
  • ESL for FPGAs
  • ESL and embedded-software development
  • Design case studies with ESL

Before submission authors should carefully read over the journal's Author Guidelines, which are located at http://www.hindawi.com/journals/jece/guidelines/. Prospective authors should submit an electronic copy of their complete manuscript through the journal Manuscript Tracking System at http://mts.hindawi.com/ according to the following timetable:


Articles

  • Special Issue
  • - Volume 2012
  • - Article ID 358281
  • - Editorial

ESL Design Methodology

Deming Chen | Kiyoung Choi | ... | Zhiru Zhang
  • Special Issue
  • - Volume 2012
  • - Article ID 105250
  • - Research Article

Parametric Yield-Driven Resource Binding in High-Level Synthesis with Multi-Vth/Vdd Library and Device Sizing

Yibo Chen | Yu Wang | ... | Andres Takach
  • Special Issue
  • - Volume 2012
  • - Article ID 691864
  • - Research Article

Task-Level Data Model for Hardware Synthesis Based on Concurrent Collections

Jason Cong | Karthik Gururaj | ... | Yi Zou
  • Special Issue
  • - Volume 2012
  • - Article ID 593532
  • - Research Article

Selectively Fortifying Reconfigurable Computing Device to Achieve Higher Error Resilience

Mingjie Lin | Yu Bai | John Wawrzynek
  • Special Issue
  • - Volume 2012
  • - Article ID 537327
  • - Research Article

A State-Based Modeling Approach for Efficient Performance Evaluation of Embedded System Architectures at Transaction Level

Anthony Barreteau | Sébastien Le Nours | Olivier Pasquier
  • Special Issue
  • - Volume 2012
  • - Article ID 906350
  • - Research Article

High-Level Synthesis under Fixed-Point Accuracy Constraint

Daniel Menard | Nicolas Herve | ... | Hai-Nam Nguyen
  • Special Issue
  • - Volume 2012
  • - Article ID 862469
  • - Research Article

Automated Generation of Custom Processor Core from C Code

Jelena Trajkovic | Samar Abdi | ... | Daniel D. Gajski
  • Special Issue
  • - Volume 2012
  • - Article ID 484962
  • - Research Article

Hardware and Software Synthesis of Heterogeneous Systems from Dataflow Programs

Ghislain Roquier | Endri Bezati | Marco Mattavelli
  • Special Issue
  • - Volume 2012
  • - Article ID 649057
  • - Research Article

High-Level Synthesis: Productivity, Performance, and Software Constraints

Yun Liang | Kyle Rupnow | ... | Deming Chen
Journal of Electrical and Computer Engineering
 Journal metrics
Acceptance rate17%
Submission to final decision101 days
Acceptance to publication44 days
CiteScore0.690
Impact Factor-
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