Fabrication of Lateral Polysilicon Gap of Less than 50 nm Using Conventional Lithography
Figure 3
The process flow for the fabrication of polysilicon nanogap structure. (a) Silicon wafer starting material; (b) deposit of 50 nm SiO2 layer; (c) deposit of 150 nm Si3N4 layer; (d) deposit of 2000 nm polysilicon layer; (e) deposit of 135 nm Al layer; (f) photoresist coating; (g) Mask 1 exposure; (h) the resist development; (i) wet etching for Al layer; (j) dry etching of polysilicon layer; (k) exposure of Mask 2 after depositing Ti/Au layer; (l) final device after wet etching for the Ti/Au electrode.
