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Journal of Nanomaterials
Volume 2015, Article ID 956101, 10 pages
http://dx.doi.org/10.1155/2015/956101
Research Article

Electrical Properties of Nanoscale ZnS Thin Film Transistor

Semiconductor Engineering, Cheongju University, 298 Daesung-ro Chungwon-ku, Cheongju 360-764, Republic of Korea

Received 3 March 2015; Revised 28 May 2015; Accepted 2 June 2015

Academic Editor: Edward A. Payzant

Copyright © 2015 Teresa Oh. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

To understand the contact mechanism from electrical properties of the ZnS TFTs, ZnS was fabricated on SiOC as a gate insulator on a Si substrate. Ohmic contact without a potential barrier increased the leakage current, but Schottky contact decreased the leakage current because of a Schottky barrier (SB). The ZnS TFTs prepared on SiOC with a Schottky contact improved the stability with respect to the reduction of drain voltages. The structural matching between ZnS and SiOC increased the height of SB such as ZnS annealed at 200°C, which made ZnS become an amorphous structure. ZnS/SiOC films with a low SB increased the capacitance and leakage current. The crystallinity orientation of ZnS localized defect states and the drift current owing to the impurity charge carriers caused the leakage current through low SB near zero voltages. But the increment of diffusion currents in a depletion layer increased the SB and then decreased the leakage current. So the electrical properties of devices were improved by a tunneling effect of diffusion currents.

1. Introduction

Thin films of wide band gap II–VI compounds, such as CdS, CdSe, and ZnS, have received considerable attention as photoelectronic materials. ZnS was used in a buffer layer for the fabrication of solar cells. Its advantages include large energy band gap, nontoxic environmental materials, and superior optical properties that make ZnS suitable for nanoscale devices [1, 2]. However, the undesirable cross talk of source/drain regions and the power consumption also increase with decreasing feature size. The root cause can be attributed to poor electrostatics between the gate and the channel. Thus the detail contact mechanism in nanosize materials is explored and there is a substantial need to find new semiconductors. The thin film transistors with channel materials such as ZnS, IGZO, and AZO were usually showed as the unipolar transfer characteristics [38], but it was reported that ZnO thin film transistor that used SiOC as a gate insulator had bidirectional ambipolar properties. SiOC became low dielectric constant with lowering the polarity, which helps to have good chemical and physical properties for high electrical quality [915]. Some factors which include the interactions between ZnO and SiOC phases and the strong adsorption to the substrate at the ZnO/SiOC surface are responsible for the improvement of performance [1618]. SiO2 as a gate insulator was usually used to develop a thin film transistor device with new channel materials, and most TFTs had n-type characteristics [1923].

In this work, the ZnS thin film transistor with a gate insulator SiOC was fabricated to research the Ohmic and Schottky contacts depending on annealing temperatures. In order to understand the role of conduction mechanism on the thin film transistor with ZnS channel, the capacitance, leakage current, -, and - were analyzed for the correlation between Schottky contact and the transfer curves of transistors. The relationship between the depletion layer and electric potentials was also studied with increasing annealing temperatures.

2. Experimental Procedure

To obtain electrical characteristics and contacts of TFTs, the ZnS/SiOC TFTs were fabricated. SiOC as a gate insulator was prepared by the RF sputtering system using the target of SiOC, which was prepared on p-type Si substrates at room temperature and RF power of 250 W for 20 minutes. ZnS was also grown on SiOC/Si by the RF sputtering system with 70 W for 10 minutes. ZnS/SiOC films were annealed at 100, 200, and 300°C to observe the Ohmic/Schottky contacts. The target to substrate distance was kept at 100 mm and the base pressure was 4.5 × 10−5 Pa and the working pressure of the chamber with oxygen gas was 1.2~1.4 × 10−3 Torr. The oxygen (99.9999%) was controlled by mass flow controller (MFC) for 20 min. For the analysis of electric properties, the aluminum was evaporated using the mask pattern on the surface of the specimen, where the sputter-deposited aluminum with an area of  cm was used on the top electrode. Electrical leakage currents for the films were measured by the semiconductor parameter analyzer (HP 4140B) at 1 MHz using MIS (metal/insulator/Si, Al/SiOC films/p-Si) structure. Capacitance was researched by the precision LCR meter (4284A), and the transfer characteristics of TFTs were done by the HP4155A. To research the characteristics of ZnS and dependence on temperatures and insulator SiOC, the ZnS and ZnS/SiOC, which were prepared with various annealing temperatures, were analyzed by PL and XRD patterns.

3. Results and Discussions

The depletion layer, which is related to a height of Schottky barrier (SB), is an important factor to define Schottky and Ohmic contacts [2427]. In the depletion layer in semiconductors, diffusion currents enhance and drift currents cutoff; therefore, the depletion layer at a junction makes the Schottky barrier in semiconductor devices. To understand contact mechanism, the temperature dependence at an interface of a thin film fabricated on Si and an interface between SiOC and ZnS was researched, and the electrical properties of ZnS TFTs were researched by the HP4155A.

The crystalline orientation of the ZnS was determined at about 29.3° and 33.6° using XRD patterns with annealing temperatures as shown in Figure 1. The XRD patterns near 29.3° did not shift with increasing the temperatures, but the intensity of peaks near 33.6° increased at ZnS annealed at 100°C. Moreover, the peak near 33.6° of ZnS annealed at 200°C disappeared and it means that it became an amorphous structure. Therefore, the crystalline orientation of the ZnS, which has a wurtzite structure to match with a substrate, was the highest at 100°C annealing.

Figure 1: XRD patterns of ZnS with annealing temperatures near 2 theta of (a) 29.3° and (b) 33.6°.

Figure 2 compares the optical transmission spectra between ZnS, SiOC, and ZnS/SiOC grown on Si wafer substrate measured at room temperature by UV-visible spectrophotometer. All of the samples showed the broad PL spectra of 350 nm~800 nm with a main peak of 460 nm, and the full width half maximum (FWHM) of PL of SiOC and ZnS/SiOC was lower than that of ZnS. The intense PL emission peak confirms the good optical property of ZnS/SiOC, so this indicates that the optical characteristic of ZnS was improved by using SiOC due to the low surface energy and the decrease of a contact resistance at an interface between ZnS and SiOC [9, 10].

Figure 2: Comparison of PL spectra between ZnS, SiOC, and ZnS/SiOC.

Figure 3 is PL spectra of ZnS and ZnS/SiOC with annealing temperatures. The PL spectra of ZnS were similar formations with increasing the annealing temperature as seen in Figure 3(a). However, those of ZnS/SiOC were various features in accordance with the annealing temperatures, and the PL peak of ZnS/SiOC annealed at 100°C moved to low wave number from 460 nm to 405 nm. This result agreed with the crystalline orientation of the ZnS annealed at 100°C as previously mentioned in Figure 1(b). In particular, the strong and intrinsic PL emission peak of ZnS could be obtained on SiOC after annealing at 100°C. The high level properties of oxide semiconductors which used SiOCs were reported in the author’s previous paper [28]. To analyze the relationship between the crystallinity and electrical characteristics of ZnS/SiOC, the transfer characteristics of ZnS/SiOC TFTs were measured with various drain voltages from 10 V to 0.001 V. The - was also researched to define the contact mechanism of TFTs.

Figure 3: PL spectra with annealing temperatures, (a) ZnS and (b) ZnS/SiOC.

Figure 4 shows the electrical - and - characteristics of ZnS TFTs with SiOC as a gate insulator prepared on Si at room temperatures. - curves shifted to left side with increasing the gate bias voltages but - curves could not be obtained in spite of decreasing the drain bias voltages. Because the depletion layer at an interface between ZnS and SiOC was incompletely formed, to make a depletion layer at an interface between ZnS and SiOC by the electron-hole recombination, ZnS/SiOC films were annealed at 100, 200, and 300°C.

Figure 4: Electrical properties of ZnS TFT on SiOC/Si substrate, (a) - curves and (b) transfer characteristics of -.

Figure 5 is - transfer characteristics of annealed ZnS TFTs and logarithm of - transfer characteristics. All of the samples showed the ambipolar characteristics with decreasing the drain bias voltages. ZnS/SiOC films annealed at 100°C could not obtain the - over = 1 V, although ZnS/SiOC films annealed at 200 and 300°C did not observe the - curves over = 5 V.

Figure 5: - transfer characteristics of ZnS TFTs annealed at (a) 100°C, (b) 200°C, and (c) 300°C; log plot of ZnS TFT annealed at (d) 100°C, (e) 200°C, and (f) 300°C.

To understand the correlation between diffusion currents and - curves, the - transfer characteristics in the range of −5 V < < 5 V of annealed ZnS TFTs was researched as shown in Figure 6. The log plotted - curves of ZnS TFT annealed at 100 and 300°C were shown as the distortion. This means that the depletion layer annealed at 200°C at an interface between ZnS and SiOC was superior compared to others.

Figure 6: Log plotted - curves of ZnS TFTs annealed at (a) 100°C, (b) 200°C, and (c) 300°C.

Figure 7 displayed the - curves of annealed ZnS TFTs. The - curves of ZnS TFT annealed at 100 and 300°C were similar to change right shift with increasing the gate bias voltages, but that annealed at 200°C was a different formation compared with other annealed films.

Figure 7: - curves of ZnS TFTs annealed at (a) 100°C, (b) 200°C, and (c) 300°C.

Figure 8 is the electrical properties of ZnS/SiOC/Si and capacitance. The leakage current of ZnS/SiOC/Si annealed at 200°C was the lowest and the capacitance of ZnS/SiOC/Si annealed at 200°C was also the lowest. The charge carriers for drift currents increased a capacitance and then decreased the SB. In the leakage current in the region of 10−4 A < current <   10−4 A, most samples without a sample annealed at 200°C with a high Schottky barrier increased the leakage currents as shown in Figure 8(b).

Figure 8: Electrical properties of structure with Al/ZnS/SiOC/Si substrates to research a contact mechanism, (a) current of 10−4 A < <  10−4 A, (b) 10−8 A < <  10−8 A, and (c) capacitance.

Figure 9 was current-voltage properties in a range of −3 V < < 3 V, and Figure 9(b) observed the ZnS/SiOC/Si annealed at 200°C with Schottky contact between ZnS and SiOC. The growth of ZnO prepared on SiOC was closely related to the contact mechanism. The qualifying of ZnO/SiOC TFTs depended on a height of SB according to the annealing temperatures. The contact mechanism was defined by leakage currents of thin films with MIS structure. In particular, the low leakage current caused high Schottky barrier and enhanced the performance about a stability of transistors as shown in Figure 6(b) compared with TFTs, which has low SB and high leakage current. This result depicts that the qualifying of Schottky contact needs high SB and low leakage currents to attend with good TFT performance.

Figure 9: Current-voltage of Al/ZnS/SiOC/Si structure, (a) Ohmic contact and (b) Schottky contact of sample annealed at 200°C in the region of 10−8 A < <   10−8 A.

4. Conclusions

This research included the electrical properties depending on the contact mechanism of ZnS/SiOC TFT devices. The electrical characteristics of ZnS/SiOC depended on the annealing temperatures. The transfer characteristics of ZnS/SiOC TFT were shown as the ambipolar properties with respect to high Schottky barrier, which was made from the reduction of polarities in SiOCs as a gate insulator. The structural matching between ZnS and SiOC increased the height of SB for a band to band tunneling phenomenon and improved the performance of TFTs. The induction of a depletion layer also caused the decrement of leakage currents by the increment of SB, which was made from the diffusion current fabricated by an electron hole combination due to the difference between carrier concentrations. The diffusion current in a depletion layer and drift current in a channel are two kinds of conduction mechanism in semiconductor devices. The diffusion current for a band to band tunneling was proportional to the height of SB, and the leakage current decreased with increasing the SB. Finally, the electrical performance of devices was improved.

Conflict of Interests

The author declares that there is no conflict of interests regarding the publication of this paper.

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