Journal of Nanomaterials / 2019 / Article / Fig 6

Research Article

Comprehensive Study of Kinetics of Processes Competing during PECVD Ultrathin Silicon Layer High-Temperature Annealing

Figure 6

Changes during high-temperature annealing for two types of samples with “thin” PECVD Si layer (dashed lined and empty symbols) and with “thick” PECVD Si layer (full lines and symbols) of (a) total free silicon (a-Si+c-Si) and (b) total oxide thickness (“SiO2 on top”+“SiO2 within PECVD Si”).

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