The rapid development of CMOS scaling into nanometer regime generates broad interests on novel device architectures as well as involvement of new materials. These interests eventually lead to a variety of modeling approaches, analytical, explicit, or computational intensive, which is crucial for simulating the behavior of those new nanostructures as well as predicting the performance of future nanodevices. The importance of more sophisticated transport phenomena with quantum effect also adds to the requirement as it is closely associated with the proper explanation of low dimensional structures.

We invite authors to submit original research findings as well as review articles in the modeling and simulation area that will enhance the understanding of nanoscale device behavior. We are specifically interested in papers elaborating the modeling approaches for nanostructures and materials for prolonging the device scaling to the next decade, both for silicon and nonsilicon-based devices. Potential topics include, but are not limited to:

• Theoretical frameworks for low-dimensional nanostructure-based devices
• Compact modeling for nanodevices (silicon and nonsilicon)
• Modeling of mechanical, optical, and electrical properties of nanostructures
• Nanoscale thermal transport phenomena of nanodevices and nanostructures
• Reliability modeling of novel devices
• Simulation and characterization methods of nanomaterials

Before submission authors should carefully read over the journal’s Author Guidelines, which are located at http://www.hindawi.com/journals/jnm/guidelines/. Prospective authors should submit an electronic copy of their complete manuscript through the journal Manuscript Tracking System at http://mts.hindawi.com/submit/journals/jnm/mona/ according to the following timetable: