Journal of Nanotechnology

Volume 2017, Article ID 4678571, 9 pages

https://doi.org/10.1155/2017/4678571

## Modeling, Simulation, and Analysis of Novel Threshold Voltage Definition for Nano-MOSFET

Department of ECE, MNNIT Allahabad, Allahabad 211004, India

Correspondence should be addressed to Yashu Swami; ni.ca.tinnm@9051ler

Received 13 July 2017; Revised 20 August 2017; Accepted 9 October 2017; Published 26 November 2017

Academic Editor: Paresh Chandra Ray

Copyright © 2017 Yashu Swami and Sanjeev Rai. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

#### Abstract

Threshold voltage (*V*_{TH}) is the indispensable vital parameter in MOSFET designing, modeling, and operation. Diverse expounds and extraction methods exist to model the on-off transition characteristics of the device. The governing gauge for efficient threshold voltage definition and extraction method can be itemized as clarity, simplicity, precision, and stability throughout the operating conditions and technology node. The outcomes of extraction methods diverge from the exact values due to various short-channel effects (SCEs) and nonidealities present in the device. A new approach to define and extract the real value of *V*_{TH} of MOSFET is proposed in the manuscript. The subsequent novel enhanced SCE-independent *V*_{TH} extraction method named “hybrid extrapolation *V*_{TH} extraction method” (HEEM) is elaborated, modeled, and compared with few prevalent MOSFET threshold voltage extraction methods for validation of the results. All the results are verified by extensive 2D TCAD simulation and confirmed analytically at various technology nodes.

#### 1. Introduction

Ceaseless curtailing of integrated circuit technology along with the accuracy of threshold voltage management methods and depletion in short-channel effects (SCEs) are emphasizing the threshold voltage to exceptionally low values. It is necessary to extract the precise threshold voltage (*V*_{TH}) for appropriate performance of the device. Flawlessly evaluated threshold voltage is mandatory to deliver correct and genuine gate control in channel conductivity and output characteristics of the device [1, 2]. Minor millivolt inaccuracy cannot be shirked because it may trigger grievous faults in the circuit practicality. Precisely for high-speed sturdy analog circuit nanoscale design, accurate threshold voltage evaluation is vital and crucial for accurate device behavior [3–5]. The extracted threshold voltage assists the process of device matching too. Threshold voltage is often exerted in evaluation and anticipation of device operation. The value of *V*_{TH} is often utilized in examining the discrepancy because of manufacturing process technological parameter fluctuations. Additional utilizations of threshold voltage value are compiled as to appraise reliability elements like radiation damage, hot carrier, stress, temperature instability, and ageing degradation.

Generally, the *V*_{TH} value is extracted specifically from the device transfer characteristics [6, 7]. The functional drain voltage (*V*_{DS}) exaggerates several SCEs like DIBL, *V*_{TH} roll-off, punchthrough, surface scattering, velocity saturation, impact ionization, and hot electron effect. No particular evaluative analytic locus can be acknowledged as *V*_{TH} in the device transfer characteristic curve due to subthreshold leakage phenomenon, hence causing ambiguity in the *V*_{TH} extraction process. In the curve, weak inversion section demonstrates exponential divergence, whereas strong inversion section indicates linear/quadratic divergence. Conversely, the *V*_{TH} is distinguished in the midst of weak and strong inversion transition sections. Threshold voltage likewise hinge on numerous device parameters (gate width, gate overlap, gate length, biased bulk, temperature, etc.) and process technology limitations (*C*_{ox}, *T*_{ox}, doping concentration, etc.), making the definition and extraction extrastrenuous [8].

In consideration of the above, the manuscript presents a new simple approach to define and extract the *V*_{TH} of MOSFET. The corresponding novel enhanced SCE-independent *V*_{TH} extraction method named “hybrid extrapolation extraction method” (HEEM) is further illustrated and compared with few prevalent customary MOSFET *V*_{TH} extraction methods for validation of the results and claim the predominance of the HEEM over other extraction methods with minimum influence of short-channel effects (SCEs) and other second-order effects like DIBL, *V*_{TH} roll-off, punchthrough, surface scattering, velocity saturation, impact ionization, and hot electron effect. Rest of the paper is organized as follows. Section 2 presents the conventional threshold voltage definitions of MOSFET. Section 3 expounds the HEEM. Section 4 implements the HEEM concept on the test device and conventional MOSFET models. Furthermore, Section 5 presents the simulation results and validation of the proposed method and evaluation and analysis of discrete sub 45 nm technology nodes. Finally, concluding remarks and enhancement in the field are presented in Section 6.

#### 2. Conventional Threshold Voltage Definitions of MOSFET

The conventional definition of the threshold voltage of doped semiconductor devices states that the gate voltage produces a surface potential equal to twice the fermi potential (*∅*_{B}) in the bulk of the semiconductor [9]. Mathematically, the threshold surface potential (*Ψ*_{TH}) can be articulated aswhere *β* represents the inverse of thermal voltage and *p*_{0} and *n*_{0} are the equilibrium hole and electron densities, respectively [10, 11]. *N*_{A} and *n*_{i} are the substrate doping density and intrinsic free-carrier concentration, respectively.

Experimentally, it is observed that the modeled conventional definition does not agree well with the *V*_{TH} value extracted from the transfer characteristic curve. Consequently, the enhanced definition was proposed for hot channel devices by including the MOSFET second-order effects. The proposed empirical term (6/*β*) was added to (1) for a typical range of MOSFET substrate doping concentrations and oxide thickness. The improved empirical definition is modeled as

The conventional definition was also modified for long-channel devices by adding the corresponding empirical parameters to (1). The improved expression was developed by comparing the inversion and depletion charge terms of the device. Hence, the modified long-channel empirical definition is modeled aswhere the empirical parameter is valued for the typical range of substrate doping concentrations and oxide thickness analogous to long-channel devices. We can easily extract the subsequent threshold voltage (*V*_{TH}) from the threshold surface potential (*Ψ*_{TH}) of n-channel MOSFET using the standard basic threshold voltage MOSFET model expression.

The modified conventional definitions proposed in [10, 11] are based on the concept of intersection of the two asymptotes of the surface potential for the depletion and strong inversion region surface potential, whereas the enhanced HEEM concept is a current-based approach for evaluating *V*_{TH} (elaborated in the Section 3). Hence, it is easier to model and simulate at nanolevel and more accurate to define even for upcoming slim ballistic transistors.

The concept proposed in [10, 11] works well for long-channel devices but deviates to give accurate results in extracting *V*_{TH} for nano-MOSFETs with thin oxide layers and high doping densities. It also fails to generate sharp surface potential curves for nanodevices, hence asymptotic *V*_{TH} point for nanodevices. The model equations of [10, 11] are approximate asymptotic *V*_{TH} definition. It does not have an explicit expression for threshold voltage and gives considerable errors in predicting the *V*_{TH} value at nanolevel technologies. Furthermore [10, 11], study includes only the classical effects with lot of approximations. The enhanced HEEM logic is applicable for both short-channel and long-channel devices and gives more accurate results. The HEEM logic generates sharp curves even working at nanotechnology node; hence, more accurate well-defined values are obtained. Simulation results validate the results shown in upcoming sections.

#### 3. A Novel Approach: Hybrid Extrapolation *V*_{TH} Extraction Method

The new simple straightforward approach of extracting the threshold voltage of nano-MOSFETs is based on globally accepted drift-diffusion model (DDM) and latterly developed ballistic, quasi-ballistic model. The transfer characteristics of MOSFET exemplify that the diffusion current governs the subthreshold region, while the drift current dominates in the linear-saturation region. The net entire current is equal to the summation of drift current and diffusion current. However, if potential across the drain to source terminals (*V*_{DS}) is zero, the net current flow is also nil as no current streams across the equipotential terminals even after biasing the gate terminal [12–14].

The constant current threshold voltage extraction method has an unclear description of critical drain current (*I*_{DCRITICAL}) liable on the technology employed. Linear extrapolation method, quadratic extrapolation method, and transition method results are highly influenced by many second-order effects like mobility degradation, short-channel effects, and extrinsic resistance effects [6, 7, 15]. Second derivative method, third derivative method, Ghibaudo method, reciprocal H-function method, and transconductance to current ratio method are extensively exaggerated by noise. The *V*_{TH} definitions are also not based on ideal *V*_{TH} definition condition [16]. The match point method is seldom used as it is more laborious and more time-consuming. 5% deviation value is also an ambiguous definition of threshold voltage calculation in match point method [17]. In normalized mutual integral difference method and normalized reciprocal H-function method, the accurate evaluation of maxima in wide ranges makes the *V*_{TH} extraction process tough and problematic [18, 19]. The HEEM has the competence to accurately determine the threshold voltage (*V*_{TH}) of MOSFET and totally remove or nullify the abovementioned flaws of the predefined existing extraction methods.

For simplicity, we have only considered the n-channel MOSFET to illustrate this unique HEEM approach. Similar analysis can be extended for p-channel MOSFET. Following assumptions are made purposely: the device is considered to be laterally symmetrical and the source, drain, and bulk terminals are considered to be grounded; hence, no potential exists amongst the corresponding terminals, the gate is made of n+ polysilicon with work function , the immobile charge in the oxide near the oxide-semiconductor interface has the same dispersal over both p and n regions, and the interface traps or interface states have the same distribution for both the p and n parts of the device close to metallurgical junction.

With the drain and source terminals grounded, the gate terminal governs the charge in the channel. When a small positive-biased voltage is applied to the gate of n-channel MOSFET, the state within the channel will alter. The free holes present in p-type silicon are deterred, thus forming a depletion region in the channel. This depletion region is formed over both lateral and vertical directions, that is, across the length and width of the channel. Increasing the positive gate voltage further will eventually lead to the saturation of the depletion depth. Once the saturation of the depletion region is reached, additional gate voltage will entice negative mobile electrons to the channel surface [20]. When adequate electrons have accrued in the channel area, the surface of the channel alters from the hole-dominated to the electron-dominated silicon material and is said to have inverted. Under this condition, a steering n-channel or inversion layer is formed under the gate between the two n+ silicon materials, namely, source and drain regions. Additional upsurge in gate voltage will only increase the surface potential of the channel gradually beyond , whereby the increased gate voltage drops across the gate oxide. The minimum gate voltage required to form the conducting channel or an inversion layer underneath the surface is called as threshold voltage (*V*_{TH}). Figure 1 represents the 10 nm test device simulation results of drift current and diffusion current components versus gate voltage (*V*_{GS}) for *V*_{DS} = 0.1 V. We can further classify the four MOSFET operation states as depletion region, weak inversion, moderate inversion, and strong inversion in reference.