Design Exploration and Performance Strategies towards Power-Efficient FPGA-Based Architectures for Sound Source Localization

<div>Clock regions for the time multiplexing of the computation of multiple <span class="nowrap"><svg height="11.9087pt" id="M165" style="vertical-align:-3.2728pt" version="1.1" viewbox="-0.0498162 -8.6359 15.3559 11.9087" width="15.3559pt" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink"><g transform="matrix(.013,0,0,-0.013,0,0)"><path d="M822 650H589L583 622C660 617 677 607 674 561C672 534 664 481 647 390L600 137H596L273 650H126L120 622C176 620 194 615 207 594C221 571 225 557 214 504L161 257C141 166 129 112 121 85C108 42 83 30 29 28L23 0H260L266 28C193 33 173 42 176 89C178 122 186 172 202 255L256 527H259L583 -8H612L690 390C708 481 720 535 728 558C744 603 756 619 816 622L822 650Z"></path></g><g transform="matrix(.0091,0,0,-0.0091,10.062,3.132)"><path d="M257 449C165 449 37 374 37 209C37 98 119 -12 256 -12C355 -12 473 65 473 226C473 349 381 449 257 449ZM244 416C333 416 380 320 380 204C380 67 329 21 267 21C184 21 130 115 130 241C130 354 184 416 244 416Z"></path></g></svg>.</span></div>

Journal of Sensors

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Figure 16

Figure 16: Design Exploration and Performance Strategies towards Power-Efficient FPGA-Based Architectures for Sound Source Localization 