Bifurcation Analysis of a Van der Pol-Duffing Circuit with Parallel Resistor

<table>Graph of <svg height="16.450001" id="M409" style="vertical-align:-3.3907pt" version="1.1" viewbox="0 0 11.0375 16.450001" width="11.0375" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink">
<g transform="matrix(.017,-0,0,-.017,.062,12.162)"><path d="M238 681l-124 -585q-7 -31 4 -31q10 0 37.5 18.5t49.5 41.5l16 -22q-40 -48 -89.5 -81.5t-76.5 -33.5q-42 0 -16 122l105 488q7 32 0 41t-39 9h-35l5 26q35 3 71 13t58 17.5t26 7.5q14 0 8 -31z" id="x1D459"></path></g>
<g transform="matrix(.012,-0,0,-.012,4.637,16.25)"><path d="M285 378v-2q65 -13 102 -54.5t37 -97.5q0 -57 -30.5 -104.5t-74 -75t-85.5 -42t-72 -14.5q-31 0 -59.5 11t-40.5 23q-19 18 -16 36q1 16 23 33q13 10 24 0q58 -51 124 -51q55 0 88 40t33 112q0 64 -39 96.5t-88 32.5q-29 0 -64 -11l-6 29q77 25 118 57.5t41 84.5
q0 45 -26.5 69.5t-68.5 24.5q-67 0 -120 -79l-20 20l43 63q51 56 127 56h1q66 0 107 -37t41 -95q0 -42 -31 -71q-22 -23 -68 -54z" id="x33"></path></g>
</svg> with respect to <svg height="7.9499998" id="M410" style="vertical-align:-0.1638pt" version="1.1" viewbox="0 0 9.7749996 7.9499998" width="9.7749996" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink">
<g transform="matrix(.017,-0,0,-.017,.062,7.675)"><path d="M545 106q-67 -118 -134 -118q-24 0 -40 37.5t-30 129.5h-2q-47 -72 -103 -119.5t-108 -47.5q-47 0 -76 45.5t-29 119.5q0 113 85 204t174 91q47 0 70 -33.5t43 -119.5h3q32 47 80 140l55 13l10 -9q-47 -80 -138 -201q17 -99 27.5 -136t22.5 -37q23 0 69 61zM333 204
q-14 98 -31 149.5t-50 51.5q-49 0 -94 -70t-45 -164q0 -55 15.5 -86t40.5 -31q70 0 164 150z" id="x1D6FC"></path></g>
</svg>.</table>

Mathematical Problems in Engineering

fig5

Figure 5

Figure 5: Bifurcation Analysis of a Van der Pol-Duffing Circuit with Parallel Resistor 