Mathematical Problems in Engineering

Mathematical Problems in Engineering / 2012 / Article

Research Article | Open Access

Volume 2012 |Article ID 526394 | https://doi.org/10.1155/2012/526394

John Alexander Taborda, Daniel Burbano, Fabiola Angulo, "Quantization Effects on Period Doubling Route to Chaos in a ZAD-Controlled Buck Converter", Mathematical Problems in Engineering, vol. 2012, Article ID 526394, 19 pages, 2012. https://doi.org/10.1155/2012/526394

Quantization Effects on Period Doubling Route to Chaos in a ZAD-Controlled Buck Converter

Academic Editor: Cristian Toma
Received02 Feb 2012
Accepted31 Jul 2012
Published04 Oct 2012

Abstract

The quantization effect in transitions to chaos and periodic orbits is analyzed in this paper through a specific application, the zero-average-dynamics- (ZAD-) controlled buck power converter. Several papers have studied the quantization effects in the one periodic orbit and some authors have given guidelines to design digitally controlled power converter avoiding limit cycles. On the other hand many studies have been devoted to analyze the ZAD-controlled buck power converter, but these past studies did not include hardware considerations. In this paper, analog-to-digital conversion process is explicitly introduced in the modeling stage. As the feedback gain is varied, the dynamic behavior depending on the analog-to-digital converter resolution is numerically analyzed. Particularly, it is observed that including the quantizer in the model carries out several changes in the transitions to chaos, which include interruption of band-merging process by cascades of periodic inclusions, disappearing of band transitions, and multiple coexisting of periodic orbits. Many of these phenomena have not been reported as a consequence of the quantization effects.

1. Introduction

In the recent years, many physical systems have been modelled using the theory of nonsmooth dynamical systems (NSDSs) [1]. The piecewise smooth dynamical system (PWS) approach has mainly been used to model nonsmooth phenomena such as switching, saturation, sliding, or impacting events [2, 3]. A good compromise between simplicity and accuracy has been achieved using PWS models in many works [4, 5]. However, some applications could require additional considerations to achieve equivalence between the mathematical model and real system responses, as we report in this paper.

Nonsmooth systems controlled by digital techniques can require more elaborate models depending on hardware specifications or the sensitivity of the systems. Analog-to-digital conversion (ADC) processes can modify the dynamic behavior of the system due to phenomena such as quantization level or conversion time.

Power converters are modelled as PWS due to the switching action of transistors and diodes and saturation action in the PWM controller (see, e.g., [6]). Bifurcations and chaos have been detected in many power electronic models. For a broad study of nonlinear phenomena exhibited by power converters, see [7]. On the other hand, in the last decade the ZAD strategy has been developed for controlling DC-DC buck power converters. This controller forces a defined function to have zero average for each sampling period. In this case, the function is defined as a linear combination of the values of the error and its derivative at the switching instants (i.e., . Previous theoretical and numerical studies have demonstrated that the ZAD strategy offers two important advantages: very low error [8] and fixed switching frequency [9, 10]. In [10] a complete study for an ideal model of the ZAD-controlled converter was presented, when the parameter varies.

In this paper, a new model for the ZAD-controlled buck power converter is introduced and the ADC process is included explicitly for acquisition of the state variables values, that is, current flowing to the inductor and voltage across the capacitor. Data acquisition by the sensors and signal digitizing by the A/D converters are two crucial processes in the performance of the ZAD controller; however, in this paper only the dynamic behavior depending on the resolution of the A/D converters is analyzed. This resolution affects the accuracy of the state variable values changing the performance of the ZAD controller. Although some authors have included digitalization effects of analog-to-digital (A/D) and digital-to-analog (D/A) converters in different systems, either linear [11, 12] or nonlinear (such as power converters) [13, 14], their main conclusions are that the ADC processes can generate limit cycles in the dynamic behavior of the systems.

The paper is organized as follows: Section 2 presents the mathematical framework to analyze and control the buck converter. Section 3 presents a detailed analysis of the quantization effects in the transition to chaos for a ZAD-controlled buck converter, introducing the model of the ADC process and changing its resolution (). In Section 4, conclusions are presented.

2. Mathematical Model and Physical Considerations

2.1. Buck Converter

A complete study of the applications and design of power converters can be found in [15, 16]. A simplified diagram of the closed-loop synchronous buck converter is shown in Figure 1(a). Its main feature is that the output value is lower than the source (step-down converter). The switches and operate in a complementary way; that is, when is on, the switch is off and vice versa.

The mathematical model for the synchronous buck converter can be expressed in a compact form as: where , , and belongs to discrete set . The objective of controlling the buck converter is related to regulation or tracking tasks. In this paper the converter is used as a regulator. The next step is to design a control strategy so that the load voltage is regulated to a desired value. the duty cycle , which is defined as the ratio between the time that the switch is on () and the sampling time in each (s in this work). In particular the duty cycle is computed as , and is computed according to ZAD control technique as it is explained in Section 2.2. After the duty cycle is computed, the control sequence to be applied to (2.1) during one sampling time is given by

2.2. ZAD Strategy

The control strategy is based on the concept of zero-average dynamics on the function [9, 17, 18]. The ZAD strategy can be summarized as follows: to choose dynamics that will be forced to have a zero average, to force the dynamics to have zero average in each sampling period, and to compute the duty cycle. As reported in [9, 19, 20], one of the possibilities for choosing the output dynamics is to define it as a piecewise-linear function given by Taking into account (2.2) where in the first part of the interval, after to finally return to , then each part of is defined as is a dimensionless positive constant and . Therefore, the zero average condition is To find , (2.5) is solved to obtain

Finally, due to saturation effects, it is necessary to limit the duty cycle based on the sampling time. The duty cycle to be applied to the system is defined as

2.3. Analog-to-Digital Conversion Process

As the ZAD strategy will be implemented in a digital platform, the ADC process must be included in the modelling stage. The main parts of the ADC process are sample and hold, and quantization and encoder processes [21].

2.3.1. Sample and Hold

The sample and hold process consists of catching the value of the signal to be sampled at a given instant (sampling) and holding it until the instant . Then the value of the signal .

2.3.2. Quantization Process

The quantization process consists of transforming a continuous signal into a finite set of values. The quantization refers to an operation characterized by the relationship between the output signal, that is, one element of the finite discrete set, and the input signal, a continuous value. In Figure 1(b), the dashed line represents the input, and the staircase functions are the output. is the quantization level, that is, the value of the least significant bit (LSB) of the quantization process, and it can be expressed mathematically as where is the number of bits of the analog-to-digital converter and V is the upper reference voltage.

3. Bifurcation Analysis

In this section, the dynamic behavior of a DC-DC buck power converter controlled by the ZAD strategy is analyzed, when the ADC process is included in the modeling stage.

The transition from periodicity to chaos in the system without the ADC process was studied in [9, 10]. Although in those papers the signal control , the bifurcation diagrams do not show important changes when . The dynamic behavior of the system with -, - or -bit ADC resolution has significant differences from the system without an ADC process.

In this section, bifurcation diagrams of the model for different resolutions of the A/D converter are shown. Later, the observed dynamics are compared and discussion about the quantization effects is presented. In this particular case , , , and . The desired output voltage is . All bifurcation diagrams are made considering the samples of the states every seconds, that is, based on the stroboscopic map.

The system without ADC process (or with an ideal ADC process) has an asymptotically stable 1-periodic orbit for values of larger than . Bifurcation diagrams of a buck converter controlled with the ZAD strategy and neglecting the ADC process are presented in Figure 2. The first bifurcation occurs near , and it is a flip type. As is reduced, the system undergoes successive smooth and nonsmooth bifurcations. Period-doubling and border-collision bifurcations generate 2-, 4-, and 8-periodic orbits and chaotic bands with different numbers of saturated cycles, depending on nonsmooth transitions. A rigorous continuation method was applied in [19] to determinate ranges of stability and existence for the 1-, 2-, and 4-periodic orbits. The successive smooth and nonsmooth bifurcations in a very narrow range of close to 3 cause the transition from periodic orbits to chaotic bands. Band-merging processes due to crisis bifurcations are observed for . The transition between one-band chaos and two-band chaos occurs near , the transition between two-band chaos and four-band chaos is close to , and the transition between four-band chaos and eight-band chaos is close to . The period-doubling band process continues until the value is close to 3.

The inclusion of the ADC process affects the dynamic behavior of the system. Technical specifications of the A/D converters, mainly their resolution, change the behavior of the ZAD-controlled buck converter. Other aspects such as resolution of the digital PWM, noise, or precision of arithmetic calculations in the digital platform also have effects on the transition to chaos. In this paper it is considered that digital PWM has infinity resolution.

Figure 3 shows bifurcation diagrams of the model with the ADC process when is varied.

Three ADC resolutions are considered: 8, 12, and 16 bits. The remaining parameters are the same in all cases. To compare regulation errors, voltage error and current error are depicted instead of capacitor voltage and inductor current . The variables and are defined as follows: with . The quantization effects in the dynamical behavior of the system can be divided into two analyses. (i)Quantization effects in chaos and band chaos dynamics. In this case, the parameter is bounded to the range , and the ADC resolution belongs to the set .(ii)Quantization effects in periodic dynamics. In this case, the parameter is bounded to the range , and the ADC resolution belongs to the set .

Next, the main effects of converters on aperiodic and periodic dynamics are analyzed. Interesting phenomena can be seen.

3.1. Quantization Effects in Chaos and Band Chaos Dynamics

The system without an A/D converter has a period-doubling band bifurcation scenario in the range between and (see Figure 2). The structure of the chaos and band chaos dynamics is affected by the A/D converter resolution. Drastic variations in the dynamic behavior can be observed when the A/D converter resolution is fixed to bits. The band-merging process is interrupted by cascades of periodic inclusions. Only the transition between one-band chaos and two-band chaos is preserved near . Other band transitions disappear. The presence of chaos and band chaos dynamics drastically diminishes, and the sensitivity to initial conditions and coexistence of periodic solutions increase considerably. The system converges to different basins of attraction depending on the initial conditions. Dynamics with 8-bit A/D converters move to the right in the axis and remain in the same range in the axis . Therefore, voltage error at the sampling time increases approximately from to , while current error remains in the range between and (see Figures 3(a) and 3(d)).

Figures 3(b), 3(e), and 3(h) show bifurcation diagrams of the system for 12-bit ADC resolution. Overlapping cascades of periodic orbits interspersed with chaos and band chaos attractors are observed. Two band transitions are preserved: one-band chaos to two-band chaos near and two-band chaos to four-band chaos near . The presence of chaos and band chaos increases.

An interesting phenomenon associated with the two crisis bifurcations was detected. The bifurcation diagrams (Figures 3(b), 3(e), and 3(h)) show an abrupt change of dynamic behavior between the two crisis bifurcations in the interval . Different periodic windows can be seen depending on the initial conditions. Chaotic transients and fractal basin boundaries are also present. These phenomena have been studied in several works [2224]. The appearance of transient chaos is relevant to the evolution of the saddle sets [25]. A chaotic saddle, also known as a nonattracting chaotic set, usually leads to chaotic transients and fractal basin boundaries [26]. In our case, the collision between the chaotic attractor and the unstable periodic orbit when the crisis occurs for induces the formation of transient chaos and fractal basins of attraction. Figure 4 shows transient responses for with different initial conditions. Small variations in demonstrate the extreme sensitivity to the initial conditions of the system.

However, very high periodic orbits (of order 100 or 1000) could be mistaken for chaos attractors. Some attractors have a chaotic shape, but the state variables are located with a bounded dispersion. This finding suggests the existence of a sequence with a very long periodic pattern. Figure 5 was generated to illustrate this phenomenon. State variables generated by nonsaturated duty cycles are shown in blue. State variables generated by saturated duty cycles to are shown in green, and state variables generated by saturated duty cycles to are shown in red.

Figures 5(a), 5(b), and 5(c) show the chaotic dynamics for the system with an ideal ADC process. A one-band chaos attractor for , two-band chaos attractor for , and four-band chaos attractor for are presented. Any periodic pattern can be defined because the state variables are always located at different points.

The presence of chaotic dynamics diminishes as ADC resolution decreases. The system does not have chaotic attractors for any value of if the AD converter has 8-bit resolution. Different periodic orbits are observed: an 8-periodic orbit with seven nonsaturated cycles and one saturated cycle to for (Figure 5(k)) and an 18-periodic orbit with 14 nonsaturated cycles and 4 saturated cycles to for (Figure 5(l)). The attractor for has a chaotic shape, but the state variables are located in a finite set of values. The size of this set is near ; therefore, the periodicity of this attractor is near 200 (Figure 5(j)).

The same situation occurs with the attractors generated with 12-bit ADC resolution. Attractors generated with in the set have chaotic shapes, but the state variables are located in sets of finite size. The size of these sets is of the order of 1000. See Figures 5(g), 5(h), and 5(i).

Figures 3(c), 3(f), and 3(i) show the bifurcation diagrams of the system for 16-bit ADC resolution. These bifurcation diagrams are very close to the responses for an ideal ADC process. The band-merging process is observed without significant changes. Three band transitions are distinguished: one-band to two-band near , two-band to four-band transition near , and four-band to eight-band transition near . The presence of chaos and band chaos dynamics is more clear. Attractors generated with in the set have chaotic shapes and the dispersion of state variables is very close to the ideal case. All numerical proofs indicate that the responses shown in Figures 5(d), 5(e), and 5(f) are chaos and band chaos dynamics. In these cases, the possibility of extremely high periodic patterns is not considered because the dispersion of the state variables cannot be limited to a finite set.

Although the dynamic properties show important variations when ADC resolution is varied, the statistical properties are not significantly modified. Table 1 shows the evolution of the mean value and standard deviations when the ADC resolution is varied between 2 bits and 16 bits for . Differences between chaotic dynamics and very high periodic orbits are not detected by these statistical measures. However, the results of this table confirm that 8- or fewer-bit A/D converter resolution affects the regulation condition of the system. Table 2 summarizes the same test for , when the ideal model has four-band chaos. These results are very close when the ADC resolution is , , , or .


[V] [A] [V] [A]

10
12
14
16


[V] [A] [V] [A]

10
12
14
16

3.2. Quantization Effects in Periodic Dynamics

The system without an A/D converter has a 1-periodic orbit for . At , the system experiences a flip bifurcation, and a stable 2-periodic orbit exists for . Significant changes in the dynamical behavior can be observed for 8-bit ADC resolution; periodic and quasiperiodic orbits are induced in the range .

Quasiperiodic and periodic dynamics coexist when the resolution of the ADC converter is fixed to 8 bits and the range of , while coexisting periodic solutions are detected when . Figure 6(d) shows an example of a quasiperiodic dynamic of the system for an 8-bit ADC process and . Low-frequency oscillation is induced by the ADC process. Figure 6(a) shows an example of a 2-periodic orbit when . Other periodic dynamics are also possible depending on the initial conditions. Coexistence phenomena will be analyzed shortly.

Periodic and quasiperiodic orbits can be identified for 12-bit ADC resolution depending on and the initial conditions. Periodic behavior can be interrupted by quasiperiodic windows and extreme sensitivity to initial conditions can be distinguished. Figures 6(b) and 6(e) show examples of periodic and quasiperiodic orbits in the system with a 12-bit ADC process.

Dynamic behavior for 16-bit ADC resolution is very close to the behavior with an ideal ADC process. Quasiperiodic behavior can be detected near the flip transition for . The induced oscillation has lower frequency than the cases with 8 and 12 bits. See Figure 6(f).

Statistical measures show that the dynamic behavior tends toward the response of the ideal ADC process when ADC resolution is increased. Table 3 summarizes the mean values and standard deviations of state variables when ADC resolution is varied from to and .


[V] [A] [V] [A]

10
12
14
16

Coexistence of dynamics is the most interesting and representative phenomenon detected in these bifurcation scenarios. A particular case when the ZAD parameter is fixed to and ADC resolution is selected from the set is presented in the following.

Three common characteristics were identified in the three cases: (i)multiple coexisting periodic solutions depending on the initial conditions, (ii)fractal basin boundaries characterized by extreme sensitivity to the initial values, (iii) duty cycle sequences of coexisting periodic solutions are composed by nonsaturated values; that is, . Additionally, some nonsaturated duty cycles can be the same for two or more coexisting solutions. Small changes in a duty cycle value or in a recurrence pattern produce different periodic solutions.

Table 4 summarizes the characteristics of sixteen periodic orbits for and 8-bit ADC resolution. Also, 1-, 2-, 3-, 6-, 10-, 11-, and 22-periodic orbits are possible depending on the initial conditions of the voltage capacitor and inductor current . Figure 7 shows the evolution of several cases presented in Table 4. For and there is a stable 1-periodic orbit. The 1-periodic orbit is characterized by a duty cycle of , reaching low stationary error and fixed-frequency condition.


Case Duty cycle characteristics
([V], [A])

1 1 per.
2 2 per. and
3 2 per. and
4 2 per. and
5 2 per. and
6 2 per. and
7 2 per. and
8 2 per. and
9 3 per. and
10 6 per. , , and
11 6 per. , , and
12 6 per. , , and
13 10 per. ,
14 10 per. , , and
15 11 per. , ,
and
16 22 per. , , ,
, and

Seven possibilities for 2-periodic orbits are detected. All of them are defined by two nonsaturated cycles ( and ). The 3-periodic dynamics can be obtained with a duty cycle sequence where and . Figure 7(g) shows the evolution of the 3-periodic orbit.

The 6-periodic orbits are defined by duty cycle sequences with four different values, where and . Two possibilities for 10-periodic orbits are identified depending on the duty cycle sequence. Both options have four different values. The first has , , and , and the second has , , , and . The 11- and 22-periodic orbits are possible with four and five different values of the duty cycle, respectively.

The presence of multiple coexisting periodic orbits diminishes as ADC resolution increases. Ten different stable periodic orbits were detected in the fractal basin boundaries for 12-bit ADC, but only six coexisting periodic orbits were detected for the 16-bit ADC case. Additionally, the range of variation of the state variables becomes narrower as ADC resolution increases. The current is confined to the range (1.56, 1.66) for 8-bit ADC, to (1.596, 1.602) for 12-bit ADC, and to (1.5985, 1.5995) for 16-bit ADC.

Table 5 and Figure 8 summarize the dynamics found for 12-bit ADC resolution, while Table 6 and Figure 9 summarize the case for 16-bit ADC.


Case Orb. Duty cycle characteristics

1 3 per. and
2 6 per. , , and
3 6 per. , , and
4 6 per. , and
5 11 per. , ,
, and
6 18 per. , , ,
, , and
7 22 per. ,
and
8 22 per. , <