Minimizing Design Costs of an FIR Filter Using a Novel Coefficient Optimization Algorithm

Table 9

Placement and route information of four designed filters.

Filters	48 tap	121 tap	105 tap	325 tap
Die size	400 × 400 m^2	710 × 710 m^2	720 × 720 m^2	1400 × 1400 m^2
Frequency	72 MHz	66 MHz	68 MHz	55 MHz
Gate count	12,495 gates	35,104 gates	32,989 gates	87,680 gates
Fault coverage	99.3% with 40 test patterns	99.4% with 40 test patterns	99.5% with 40 test patterns	99.1% with 40 test patterns
Code coverage	100% with 256 test patterns	100% with 256 test patterns	100% with 256 test patterns	100% with 256 test patterns
Operate voltage	1.8 V	1.8 V	1.8 V	1.8 V
Power dissipation	7.531 mW @ 72 MHz	20.3 mW @ 66 MHz	21.4 mW @ 68 MHz	52.8 mW @ 55 MHz