Research Article  Open Access
Lower Power Design for UHF RF CMOS Circuits Based on the Power Consumption Acuity
Abstract
Excessive energy consumption of UHF tag is the bottleneck of energy saving in its wide range of applications. To address this issue, a lower power design for UHF RF CMOS circuits based on power consumption acuity is proposed in this paper. Through indepth analysis of the static and dynamic power generation principle of UHF RF circuits in the work, the power consumption acuity can be calculated by using the correlation of circuit power and input vector. Subsequently, under the guide of this acuity, the UHF RF CMOS circuits with better energy saving can be designed. Furthermore, according to the performance indicators of EPC CIG2 UHF RFID in UHF identification, the corresponding circuit is designed and implemented. The test results show that the design of UHF RF circuit based on the acuity of power consumption can reduce 35%–40% power consumption.
1. Introduction
Compared to other automatic identification technologies, the most prominent feature of RFID is that it is the fast noncontact technology in identification of moving objects and has high accuracy, security, and resistances to harsh environment, which can also identify multiple recognition objects and so on [1, 2]. RFID technology is widely used in industrial production and all aspects of daily life, such as dangerous goods management, supply chain management, ticketing, security, mall management, and access control [3, 4]. RFID system is different which is depending on its application. However, in general, the tag, interrogator, and processor are the basic three composed parts [5]. With the application of largescale RF technology, the power consumption of RF chip becomes the focus in this research field [6].
The researches of UHF and microwave bands tag chip got a late start, and most of them have focused in 2003–2006. Among them, the paper about tag chip research published in the literature [7, 8] is the most representative. In Karthaus and Fischer’s [9] research, the minimum input RF (radio frequency) power in UHF passive RFID tag chip is only 16.7 μW. It used the readwrite EEPROM memory to support the design and the IC was implemented in a 0.5 μm digital twopoly twometal digital CMOS technology with EEPROM and Schottky diodes. In this paper, it mainly focused on how to improve energy conversion efficiency in the RF energy acquisition, but how to achieve lowpower technology in specific circuit was not addressed, and the requirements of Schottky diode did not exist in the standard COMS process. The literature [10] proposed a design of ultralowcost UHF RFID tag chip for SCM (Supply chain management). The design process was the 0.25 μm standard CMOS, and the nonvolatile memory could be implemented by using of selfadaptive silicon approach in CMOS technology, which could greatly reduce the costs of the chip production. The power matching in the front end of RF analog, the acquisition circuit of RF energy, the energy conversion efficiency, and another key technology were studied in this paper. However, it only established a supply voltage model by using physical method to dynamically adjust the voltage. The threshold could not be changed and the effort was poor. Digital control logic and memory were accounted for the main part cost and power consumption of RFID tag chip. In the literature [11], the implementation method for embedded memory and digital controller which is suitable for RFID tag chip was investigated. In this paper, the asynchronous circuit was applied to achieve the core of RFID tag chip. However, there is a big restriction that this method is applied in RFID tags chip, since it is not compatible with standard CMOS process and high cost. The literature [12] introduced a new nonvolatile memory to reduce the tag chip’s power consumption. It was also the trend of development in future. For example, in July 2005, the memory in the RFID tags chips MB89R119 produced by Fujitsu was 256 Byte FRAM (Ferroelectric Random Access Memory). The power consumption of FRAM was lower than an EEPROM, but its production cost was higher than EEPROM, which is the main reason that FRAM is not widely used in the RFID tag chip currently. The literature designed a UHF passive tag chip, in which the antenna gain was −0.5 dB, reader transmit power was 4 W EIRP, the minimum input power of the tag was 16.7 uw, and the reading distance was about 9.25 m, but in this tag, by using the EEPROM and Schottky diodes technology, the cost of 8 chips was high and power consumption was excessive. In the literature [13], it did not contain EEPROM and digital control circuits, but the data communication rate could reach 10 Mb/s, the simulation consumption was 62.9 uw, and the calculation distance was 6.58 m, while the tapeout was not realized. The literature [14] proposed that the passive RFID system did not have a very reliable security mechanism, which could not guarantee a high reliability of data security, and the data stored within the system was vulnerable to attack mainly because the RFID chip itself and chips in the process of reading and writing data will easily be hacked. In the literature [15], the recognition rate was another problem of RFID system. For the energy intensive of liquid and metal objects, the highest accurate recognition rate of RFID tag only could be reached to around 80%. Obviously, there is a large distance before the recognition rate that can be applied in practice.
The remainder of the paper is organized as follows. Section 2 analyzes the generation principle of static and dynamic power consumption in the work of the highfrequency RF; Section 3 proposes the concept of using power acuity and the view on UHF RF circuit design on the basis of power acuity; Section 4 gives the experiment; and Section 5 is the conclusions.
2. Power Consumption of UHF RF IC Integrated Circuits
Power consumption of CMOS circuit can be divided into static and dynamic power consumption. The static power consumption is caused by the charging and discharging of large parasitic capacitance, which is considered the main source of power consumption in the circuit. The dynamic power consumption is mainly caused by the PH junction leakage current, gate leakage, and subthreshold current of the transistor; it is the important part of the overall power consumption.
2.1. The Dynamic Power Consumption of UHF RF Circuit
Dynamic power consumption is considered to be the main source of power consumption of UHF RF CMOS circuits, which is produced from the handover of tag identification circuit between two stable operating states. It consists of two parts: one is the power consumption of capacitor caused by the charging and discharging of capacitor in RF circuit reverser; the other is the power consumption of moment conduction generated by the instant conduction of tubes and . Dynamic power consumption, power consumption of capacitor, and power consumption of moment conduction are represented by , , and , respectively; therefore, the equation is as follows: .
(1) The Power Consumption Generation Principle of Capacitor in UHF RF Circuit. As shown on Figure 1(a), UHF RF CMOS inverter tube normally consists of tubes , and the load capacitance , where tube is made by PMOS technology and tube is made by NMOS technology and is connected to the inverter output end.
(a)
(b)
According to the working principle of UHF RF inverter, when the jumpbehavior of the CMOS inverter input end occurs, the charge and discharge currents will be caused. As it can be seen from Figure 1, the current generation process of charging and discharging is like this: if is 1, tube turns off, and turns on, then is 0, whereas when changes from 1 to 0, tube is turned from off to on and is just the opposite; consequently CMOS inverter will be changed from 0 to 1 and will be charged from through the tube . Conversely, if is 0, tube turns on, and turns off, then is 1; but when changes from 0 to 1, tube is turned from on to off, and tube is turned from off to on, then CMOS inverter will be changed from 1 to 0 and will be charged from through the tube .
In the process of UHF RF circuit operation, the average power consumption generated by charge current and discharge current are shown as follows:
In the above formula, is the average power when the UHF RF circuit is working, represents a cycle of operation of the circuit, represents the current when the inverter of UHF frequency circuit is charging, represents the current when the inverter of UHF frequency circuit is discharging, denotes the pin elements inside the inverter, and is the tag in which the value is only 0 or 1; it is used to mark the beginning of the charging or discharging state.
It can be obtained from the principle of charging and discharging of the CMOS inverter: , .
Therefore, it can be obtained as (2) after and are substituted into (1):
In the above formula, is the repetition frequency of . From formula (2), it can be seen that the power consumption generated by the charging current or discharge current is . The power consumption of capacitor is proportional to and .
(2) The Generated Power Consumption of Instantaneous Conduction. If it takes and , then has the state of , and in the process of change between high and low electrical levels. The instantaneous current will be produced when tubes and are simultaneously turned on. The average value is shown in (3):
Thus, the power consumption of instantaneous conduction is
is related to the frequency of ; the higher the is, the larger the is. The power consumption of instantaneous conduction is related to the input signal frequency and the voltage , the higher the frequency and voltage are, the larger of is. In addition, will also be affected by the rise and fall time of , the power voltage of CMOS tube, and others.
2.2. The Generated Static Power of UHF RF Circuit
When UHF RF circuit is in a steady state, the leakage current of inverter exists, which is the reason of static power generation. If represents power consumption of inverter, is the static power of inverter, then .
It is the solution equation of subthreshold leakage current, while subthreshold leakage current is measured value which cannot be ignored in test circuit simulation of BSIM. BSIM is the industrial standard of test circuit simulation, which is developed by University of California in Berkley and used to test circuit simulation and development of CMOS technology. It is software simulation system based on physics and occupies the characters like preciseness, upgradability, robustness, and language, which can also provide the data of Dc analysis, transient analysis, and Ac analysis of standard circuit. It is the current between source and drain electrode when the circuit is at rest. BSIM model can accurately test the subthreshold leakage current [16], as formula (5) that is shown below:
In this equation,in the solution process of subthreshold leakage current , , , and are the voltage between gridsource, drainsource, and sourcebody area of transistor, respectively. is the dielectric constant of material of transistor, is linearized effect factor ofthe leakage inductance of the barrier drop effect, is drainsource voltage, is the carrier mobility, and are the effective width and length of transistor, respectively, is the linearized influence factor of body area effect, and is surface potential. is the voltage threshold at zero bias. In the calculation process, the thermal availability voltage is unknown; in order to solve the thermal availability voltage effectively, we assumed that Plank’s constant is , the temperature of carrier is , and the electron charge is of per unit; then the calculation formula of can be shown as follows: .
With the deepening of the process, the increasing of gate leakage current is much faster than subthreshold leakage current, which can be indicated in formula (6), where and are associated with the process of physical parameters and is the barrier height of the tunneling electron (or holes).
Consider the following:
When the strong electric field is formed between reversebiased PN junctions, it will form BTBT (Reverse Biased Band to Band Tunneling) leakage current; it can be represented by using formula (7) as follows:
and refer to the sides and bottom length of the PN junction, and mean the electric field of the side and bottom of PN junction, and and are the physical parameters associated with the process [17].
3. The Saving Design of UHF RF Circuits Based on the Acuity of Power Consumption
By the preceding theory, the dynamic power of UHF RF circuit is essentially the valid statistics for jump variables of input signal. In this section, the power acuity analysis is researched indepth. Acuity of power consumption is the correlation degree of power consumption and input vector. It is a very important character of power consumption. It also can be used in low power design. If the acuity of power consumption is considered enough in the design of UHF RF circuit, it can perform an UHF RF circuit with relatively small power consumption.
3.1. The Analysis Method of Power Acuity
The power consumption of UHF RF circuit is generally divided into static and dynamic power consumption. Dynamic power consumption is considered to be the main source of power consumption of UHF RF circuits. It is produced from the switching process of UHF RF circuit between two stable operating states, which consists of two parts: one is the power consumption of capacitor caused by the charging and discharging of capacitor in RF circuit reverser, the other one is the power consumption of moment conduction generated by the instant conduction of and tubes. In the ideal case static power should be zero, but this does not mean that the static power is really zero, and actually the static power of UHF RF circuit is due to the leakage current of circuit. The leakage current includes subthreshold current, gate leakage current, and sourcedrain reverse bias leakage current. The acuity of power consumption is a very important character of power consumption. It means the change degree of power consumption is compared to the input vector. For better understanding, some related definitions and theorems of power acuity are introduced.
The probability of which signal is set to 1 and signal activity are the important indicator to measure power consumption acuity. It can reflect validly the active character of circuit and reflect the power consumption acuity directly. Assume that the action of UHF RF circuit is the 01 process of each state, which is represented by the function . Therefore, in this case, the signal probability of which signal is set to 1 and the jumping of rate signal activity can be used to indicate the activities feature of digital circuit. In the time interval , represents the activity period of UHF RF circuit; the unit is . The probability of which signal is set to 1 can be defined as follows.
Signal probability can be represented by formula (8) [18]:
represents the activity period of UHF RF circuit; is the activity frequency in time interval . Signal activity is defined as follows:
By means of analysis, when the random probability of which signal is set to 1 is 1/2, signal activity is 1/2, and the effect of power consumption acuity is the best.
As the same definition, the signal activity of from high level to low level is , and the signal activity of from low level to high level is represented by . When the random probability of signal probability is 1/2, signal activity is 1/2, and and values are 1/4.
After defining the signal probability and signal activity, the transmission characters of signal probability and signal activity are further to define.
The transmission characters of the probability which signal is set to 1 are that the signal probability of basic logic gate output signal is represented by a function of the input signal probability. Assume that a twoinput gate AND input signal probability is , then the output signal probability is . As to the gate OR, assuming its input signal probabilities are and , respectively, then the output signal probability is . Propagation of signal activity is to use the transition rate of basic logic gate input signal to indicate the output signal transition rate. After a number of logic gates, the random signal changes generally have certain regularity.
For input gate AND, only when the other input is 1, the jump of the pin can be passed out at the output side; on the contrary, if one of the logic gate values is 0 and keeps the same value, which means that this kind of jumping is blocked. So that other input jumping cannot be passed out smoothly, and 0 is the control value of gate , as it can be seen from Figure 2.
After the research on the character of signal probability and signal activity, the transmission characteristics of the basic logic gate transition rate are available. On the basis of this, power consumption acuity can be analyzed. In the circuit design process, the method of lowpower design is based on the transmission character of jump rate: if the circuit logic gate with a larger probability is near to the control value, then the design of UHF RF circuits will be with the relatively small power consumption.
The power consumption acuity is the correlation degree of power consumption and input vector. It is a very important character of power consumption.
Power consumption acuity is the changing rate of circuit power consumption probability which is set to 1. The definition is as follows:
In this equation, is the signal activity of power consumption when the signal is set to 1, represents the average power consumption per unit, is the probability of which is set to 1, represents the partial derivatives of the average dynamic power consumption for , and represents the partial derivative of the transition rate for .
Consider the following:
In this equation, is the power consumption rate of change on the signal activity, represents the average dynamic power consumption per unit, and represents the probability of signal activity of .
Through the previous studies on signal probability and signal activity and their transmission characteristics, a simple calculation method for power consumption acuity based on the transmission characteristics of transition rate can be obtained. Firstly, the signal probability and signal activity of given input vector can be adopted to make statistical analysis, and through the transmission character of signal probability, the signal probability of each circuits gate can be calculated. The signal activity of circuit input signal is set to the signal activity of input vectors, and then by the transmission characteristics of signal activity, the input and output signal activity value of the entire logic gate at the input terminal can be obtained. The sum of signal activity values of the input and output is a measure of the power consumption acuity at this terminal:
Conclusion 1. The average of dynamic power consumption of UHF RF circuit is correlated with an approximate linear relationship to its signal activity of each gate. By the following derivation, it can be demonstrated that wherein, is the total jumping time in the range of gate and gate , is status value that logic gate is on . So, by calculating the signal activity of each gate in the circuit, the average dynamic power consumption of circuit can be directly obtained.
Conclusion 2. The linear signal probability of the logic gate can be used to describe the average leakage power of UHF RF circuits, and the derivative process can be shown as follows:
Conclusion 3. Supposing each of UHF RF circuit is independently of one another, and then the circuit power consumption under specific input signal vector can be expressed by the acuity parameter equation linear of its input terminal power consumption, it is as follows:
In this formula, is the variable, and represents the th logical gate. represents the average power consumption circuit, is calculated by the previous measure formula, and is the difference between and signal activity when the a circuit obtains the average power.
3.2. The Design Process of UHF RF Circuit Based on Power Acuity
By using the acuity analysis of the power consumption, the average dynamic and static power consumption of UHF RF circuit can be calculated.
In the process of UHF RF circuit design, in order to reduce power consumption, it can be considered to reduce the power consumption acuity in low power design. If the logic gate of UHF RF circuit exists with a greater probability at the value in the control, the designed UHF RF circuit will have relatively small power consumption compared to the other. According to this conclusion, minimizing the power consumption acuity can make the circuit relatively stable in the UHF RF circuit design. Definitely, the appropriate transformations of the circuit can also lead to lower power requirement in UHF RF circuit design. The acuity in the respective input terminal of the circuit is difference, and one of the greater acuities can be selected as the control parameter, and the phase deviation of the UHF RF can be suppressed effectively. The power consumption is reduced greatly.
4. Experimental Analysis
Experiment circumstance: the experiments about acuity analysis of energy consumption are presented; the analysis is achieved by C++; the platform is VC++6.0, at the same time, running on the Precision T7610 ((Inter xeon processor E52620 v2 (6 cores HT, 2.1 GHz Turbo, 15 MB) Windows 7 professional 64 bit, 16 GB (4 × 4 GB) 1866 MHz DDR3 ECC RDIMM, 1 TB, 3.5 inch Serial ATA (7,200 Rpm) HDD, 2 GB NVIDIA Quadro K2000 (2DP & 1DVII) (2DPDVI & 1DVIVGA adapter))) workstation.
To validate the effectiveness and energy efficiency of the proposed design of UHF RF circuit based on the power consumption acuity, according to the performance indicators of EPC CIG2 UHF RFID and the power acuity theory, a UHF RF frontend circuit with the reset terminal which is suitable for the powersensitive work is presented here. The general structure is shown in Figure 3; some NOT gates are not shown in the figure, wherein the gate NOT, NAND, and NOR use transmission gate logic to reduce the fosp/snfP asymmetry.
Compared with the conventional rectifier, the delay of rectifying portion in the front end of UHF RF is small, and the leakage is low under the same operating voltage. In order to reduce the static and dynamic power consumption of circuit, the increase of circuit drive capability makes the size of the rectifier relatively large; this is not obvious for the smallscale digital circuit. When the circuit is operating in strong inversion region, it can reflect its superiority. Figure 4 shows simulation results of the structural power consumption of the standard rectifier. The simulation is performed in the typical condition, the temperature is 20°C, and the power supply voltage is 300 mv. Figure 4(a) is the result of conventional rectifier; Figure 4(b) is the result of our designed rectifier. It can be seen from Figure 4 that the maximum transient dynamic current (7 sA) of the conventional rectifier is less than the maximum transient dynamic current (20 nA) in this paper. However, the leakage power of the former is obviously larger than the latter.
(a)
(b)
As it is shown in Table 1, the overall power consumption and the clock frequency of the different process corners and different temperatures in the two rectifier working processes are 10 kHz, respectively.

According to the theory of acuity analysis, in this paper we use the transmission gate structure and increase the width to length ratio of transistor appropriately. The delay of the rectifiers designed in this paper is smaller than the traditional structure for 9.6 us under the same supply voltage and load (the NOT gate in this paper), and the consumption decreases by around 36%.
For a long time statistical analysis, the total loss curve of the UHF RF rectifier circuit and the corresponding total loss error curve are shown in Figure 5. As we can see from Figure 5, when the regulating voltage is below 20 V, the total loss error of circuit is increasing; when the regulating voltage is more than 20 V, the loss error of circuit is almost 0. For the reason that operating voltage of the UHF RF circuit is generally higher than 22 V, it can be calculated according to approximate solution, and the total loss is lower.
In accordance with the approximate solution and the exact solution, the optimal voltage curve varies with load can be available. As it can be seen from Figure 6, the optimal voltage error will increase with the changes of load, but in the operating voltage range of UHF RF circuit, the optimal voltage error is calculated to be less than 7 V. Thus, the frontend of UHF RF circuit load is small and the power consumption is relatively low.
5. Conclusions
In this paper, we reviewed the design approach or procedures of UHF tags. In response to the problem of high energy consumption, we present a lower power design for UHF RF CMOS circuit based on the power consumption acuity. The simulation results show that the leakage power of rectifier in this method is obviously less than the conventional rectifier; the delay of the rectifiers designed in this paper is smaller than the traditional structure; the total loss is lower; the design of UHF RF circuit based on the power consumption acuity can reduce 35%–40% power consumption. The proposed design method can be used for various industrial productions, public management and daily life, and so forth, and it will improve the development and efficiency of its application field.
Conflict of Interests
The authors declare that they have no conflict of interests.
Acknowledgment
This work was supported by Beijing modern agricultural technology system, Poultry innovation Team, 2013 Beijing New Rural Base Constructional Project.
References
 R. Want, “An introduction to RFID technology,” IEEE Pervasive Computing, vol. 5, no. 1, pp. 25–33, 2006. View at: Publisher Site  Google Scholar
 J. Landt, “The history of RFID,” IEEE Potentials, vol. 24, no. 4, pp. 8–11, 2005. View at: Publisher Site  Google Scholar
 R. Angeles, “RFID technologies: supplychain applications and implementation issues,” Information Systems Management, vol. 22, no. 1, pp. 51–65, 2005. View at: Google Scholar
 R. Weinstein, “RFID: a technical overview and its application to the enterprise,” IT Professional, vol. 7, no. 3, pp. 27–33, 2005. View at: Publisher Site  Google Scholar
 C. M. Roberts, “Radio frequency identification (RFID),” Computers and Security, vol. 25, no. 1, pp. 18–26, 2006. View at: Publisher Site  Google Scholar
 F. Zhou, C. Chen, D. Jin, C. Huang, and H. Min, “Evaluating and optimizing power consumption of anticollision protocols for applications in RFID systems,” in Proceedings of the International Symposium on Lower Power Electronics and Design (ISLPED '04), pp. 357–362, ACM, August 2004. View at: Google Scholar
 K. V. S. Rao, P. V. Nikitin, and S. F. Lam, “Antenna design for UHF RFID tags: a review and a practical application,” IEEE Transactions on Antennas and Propagation, vol. 53, no. 12, pp. 3870–3876, 2005. View at: Publisher Site  Google Scholar
 P. V. Nikitin, K. V. S. Rao, S. F. Lam, V. Pillai, R. Martinez, and H. Heinrich, “Power reflection coefficient analysis for complex impedances in RFID tag design,” IEEE Transactions on Microwave Theory and Techniques, vol. 53, no. 9, pp. 2721–2725, 2005. View at: Publisher Site  Google Scholar
 U. Karthaus and M. Fischer, “Fully integrated passive UHF RFID transponder IC with 16.7μ W minimum RF input power,” IEEE Journal of SolidState Circuits, vol. 38, no. 10, pp. 1602–1608, 2003. View at: Publisher Site  Google Scholar
 R. Glidden, C. Bockorick, S. Cooper et al., “Design of ultralowcost UHF RFID tags for supply chain applications,” IEEE Communications Magazine, vol. 42, no. 8, pp. 140–151, 2004. View at: Publisher Site  Google Scholar
 S. Roundy, B. P. Otis, Y. h. Chee, J. M. Rabaey, and P. Wright, “A 1. 9 GHz RF transmit beacon using environmentally scavenged energy,” Optimization, vol. 4, no. 2, p. 4, 2003. View at: Google Scholar
 R. Banakar, S. Steinke, B.S. Lee, M. Balakrishnan, and P. Marwedel, “Scratchpad memory: a design alternative for cache onchip memory in embedded systems,” in Proceedings of the 10th International Symposium on Hardware/Software Codesign (CODES '02), pp. 73–78, ACM, May 2002. View at: Google Scholar
 K. M. Ramakrishnan and D. D. Deavours, “Performance benchmarks for passive UHF RFID tags,” in Proceedings of the13th GI/ITG Conference in Measuring, Modelling and Evaluation of Computer and Communication Systems (MMB '06), VDE, 2006. View at: Google Scholar
 S. L. Garfinkel, A. Juels, and R. Pappu, “RFID privacy: an overview of problems and proposed solutions,” IEEE Security and Privacy, vol. 3, no. 3, pp. 34–43, 2005. View at: Publisher Site  Google Scholar
 H. Vogt, “Multiple object identification with passive RFID tags,” in Proceedings of the IEEE International Conference on Systems, Man and Cybernetics, pp. 651–656, October 2002. View at: Google Scholar
 R. Rao, A. Srivastava, D. Blaauw, and D. Sylvester, “Statistical analysis of subthreshold leakage current for VLSI circuits,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 12, no. 2, pp. 131–139, 2004. View at: Publisher Site  Google Scholar
 A. Keshavarzi, S. Narendra, S. Borkar, C. Hawkins, K. Roy, and V. De, “Technology scaling behavior of optimum reverse body bias for standby leakage power reduction in CMOS IC's,” in Proceedings of the 1999 International Conference on Low Power Electronics and Design (ISLPED '99), pp. 252–254, August 1999. View at: Google Scholar
 G. M. Vitetta, U. Mengali, and D. P. Taylor, “Error probability formula for noncoherent orthogonal binary FSK with dual diversity on correlated Rician channels,” IEEE Communications Letters, vol. 3, no. 2, pp. 43–45, 1999. View at: Publisher Site  Google Scholar
Copyright
Copyright © 2014 Niu Xiangjie and Li Hua. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.