Maximum Likelihood Estimation of Clock Skew in IEEE 1588 with Fractional Gaussian Noise

Table 1

Comparison between the various estimation methods.

Model	Reference	Up- and Downlink assumption	PDV model existence in the algorithm	PDV model	Exposure to PDV (2WD/OWD)
Basic concept of IEEE 1588	[20, 21, 23]	Symmetry	—	—	Up- and downlink
Dual slave clock in a slave	[18]	Asymmetry/symmetry	—	—	Uplink only
Gaussian delay model	[42, 46]	Asymmetry/symmetry	✓	Gaussian	Up- and downlink
Exponential delay model	[42–45, 47, 48]	Asymmetry/symmetry	✓	Exponential	Up- and downlink
MLE of clock skew in IEEE 1588 with fGn	(New model)	Asymmetry/symmetry	✓	fGn	Uplink only