A Data-Flow Soft-Core Processor for Accelerating Scientific Calculation on FPGAs

Table 5

Cyclops-64 versus simulated 300 DFU DFSC-based processor.

	Machine characteristics
	Cyclops-64 node	DFSC
Number of cores	160 (classical)	300 (DFUs)
Memory hierarchy level	3	1
Architecture model	Hybrid	Pure data-flow
Program execution model	Tiny-Thread (TNT)	Interconnected DPGs
Performance	Simulated	Interpolated
	70.0 GFlops^1	123 GFlops^2
	0.43 GFlops	0.41 Gflops

Input data on a chip. Included transfer time from PMP to accelerator.