Research Article
Multistability Analysis, Coexisting Multiple Attractors, and FPGA Implementation of Yu–Wang Four-Wing Chaotic System
Table 2
Xilinx ZYNQ-XC7Z020 FPGA chip resource usage.
| Resource | Used | Available | Utilization (%) |
| Slice register | 20842 | 106400 | 19.60 | Number of slice LUTs | 15931 | 53200 | 29.99 | Number of bonded IOBs | 34 | 125 | 27.2 | Number of BUFG | 1 | 32 | 3.13 | Max. clock frequency | 161.212 MHz | — | — |
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