A Hardware-Efficient Elliptic Curve Cryptographic Architecture over GF (p)

Table 2

ECC hardware performance comparison.

Design	Technology	Field order	Area (kgate)	Frequency (MHz)	Clock cycles (k)	SM (ms)	At
This work	0.13 µm CMOS	160; 192; 224; 256	35.65; 43.25; 49.41; 59.14	150; 150; 150; 150	186; 268; 364; 475	1.24; 1.78; 2.42; 3.16	44; 77; 120; 187
10	0.13 µm CMOS	160; 192; 224; 256	35.43; 43.37; 50.38; 57.05	150; 150; 150; 150	239; 342; 468; 610	1.60; 2.28; 3.12; 4.07	57; 99; 157; 232
11	0.13 µm CMOS	160; 192; 224; 256	101.3; 123.1; 143.9; 167.5	150; 138; 130; 110	129.3; –; –; –	0.87; 1.36; 1.95; 3.01	88; 167; 281; 504
13	0.13 µm CMOS	160; 192; 224; 256	117.5; 118.02; 120.26; 120.26	137.7; 137.7; 137.7; 137.7	153; 184; 297; 340	1.21; 1.44; 2.34; 2.68	142; 170; 281; 322
14	0.13 µm CMOS	256	659	163.7	3.3	0.02	13
15	0.13 µm CMOS	256	122	556	562	1.01	123