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Research Article | Open Access
L. Vela-Garcia, J. Vázquez Castillo, R. Parra-Michel, Matthias Pätzold, "An Accurate Hardware Sum-of-Cisoids Fading Channel Simulator for Isotropic and Non-Isotropic Mobile Radio Environments", Modelling and Simulation in Engineering, vol. 2012, Article ID 542198, 12 pages, 2012. https://doi.org/10.1155/2012/542198
An Accurate Hardware Sum-of-Cisoids Fading Channel Simulator for Isotropic and Non-Isotropic Mobile Radio Environments
The rapid technological development in the field of wireless communications calls for devices capable of reproducing and simulating the behavior of the channel under realistic propagation conditions. This paper presents a hardware fading channel simulator that is able to generate stochastic processes characterized by symmetrical and asymmetrical Doppler power spectral densities (PSDs) depending on the assumption of isotropic or non-isotropic scattering. The concept of the proposed hardware simulator is based on an implementation of the sum-of-cisoids (SOC) method. The hardware simulator is capable of handling any configuration of the cisoid's amplitudes, frequencies, and phases. Each of the cisoids that constitutes the SOC model is implemented using a piecewise polynomial approximation technique. The investigation of the higher-order statistics of the generated fading processes, like the level-crossing rate (LCR) and the average duration of fades (ADF), shows that our design is able to reproduce accurately the key features of realistic channel models that are considered as candidates for the latest wireless communication standards.
The increasing demand for high data rate wireless communication systems makes it mandatory to develop devices enabling the test and the performance evaluation of such systems with a high level of accuracy. A channel simulator offers the possibility of reproducing the most important channel characteristics without the necessity of conducting field tests in specific environments, which reduces significantly the system development time and the costs of the system design and the verification process.
Flat-fading wireless channels are modeled in the complex baseband as complex stochastic processes characterized by a specific autocorrelation function (ACF) or, alternatively, by the corresponding power spectral density (PSD). Considering a base station to mobile link, these functions are related to the angle-of-arrival (AOA) distribution of the incoming plane waves (in the mobile to base station link, the angle-of-departure (AOD) distribution determines the ACF and PSD) in a multipath propagation environment . The uniform distribution of the AOA (i.e., the uniform AOA probability density function (PDF) over [, )) is related to environments characterized by isotropic scattering conditions, where the ACF is determined by the zeroth-order Bessel function corresponding to the Jakes PSD . This model was originally proposed by Clarke . However, realistic propagation environments do not fulfill the isotropic scattering conditions, which result in a nonuniform distribution of the AOA, leading to an asymmetrical PSD that can exhibit a variety of shapes (see [4–8] for more details).
For the reproduction of the statistical properties of real mobile radio channels on hardware platforms, several channel emulators have been proposed in the literature (see [9–11]), where the fading samples have been generated by one of the following two methods: the filter method or the sum-of-sinusoids (SOS) method. In most cases, the generation of the fading waveforms has been accomplished under the assumption of isotropic scattering. In , a hardware channel simulator based on the filter method assuming non-isotropic scattering conditions is presented. However, the level of computational complexity in filter-based emulators is greater than in SOS-based emulators, as SOS techniques do not require the realization of white Gaussian random number generators (see ). Therefore, SOS-based simulators provide an attractive alternative because of their computational efficiency and comfortable reconfiguration capabilities.
In this paper, a novel architecture for generating stochastic processes using the SOS principle is presented. The challenge of this study is to develop a simulator, which is able to handle both symmetrical and asymmetrical PSDs in a parametric architecture, allowing the emulation of more realistic channels, which are required in modern wireless communication standards. In order to achieve this, the sum-of-cisoids (SOC) method rather than the SOS approach will be used as proposed in . The resulting hardware architecture allows the implementation of any SOC or SOS simulation model, permitting the configuration of the gains, frequencies, and phases of each complex sinusoid for any chosen deterministic or stochastic parameter computation method. In addition, this provides the methodological flexibility for adding specular and non-specular components. The sinusoid evaluation is performed using a piecewise polynomial approximation, to enable the generation of sinusoid samples at high rates with a high frequency resolution of less than 1 Hz, which is desired for the development of modern emulators based on the SOS/SOC principle. From this perspective, the polynomial approximation technique is employed here as a high-performance alternative to the direct sinusoid computation method, which is essential for traditional architectures using look-up tables (LUT) that are described in [9, 10].
The rest of this article is organized as follows. In Section 2, a brief description of the SOC method is given. The hardware architecture of a flat-fading simulator is described in Section 3. In Section 4, the study of two methods for computing the SOC parameters is provided. In Section 5, the statistical properties of the fading samples generated by the proposed hardware architecture are discussed. This is followed by the performance analysis in Section 6, which elaborates on the hardware resource costs of the proposed architecture in comparison to other existing SOS-based simulators. Finally, the conclusions are drawn in Section 7.
2. Review of the SOC Model
In this section, a brief description of the SOC model for the generation of stochastic processes is presented. Additionally, mathematical expressions for the first and second order statistics of the SOC model are reviewed, which provides a reference for comparing several given PSD functions with the corresponding approximation results obtained for the proposed flat-fading channel simulator.
2.1. Basic Description of SOC Models
In the complex equivalent baseband, a multipath flat-fading channel can be modeled by an SOC process , which is a superposition of cisoids of the form: where , , and are the gains, the Doppler frequencies, and the phases of the th propagation path, respectively. Considering that and are constants, and only are independent, identically distributed (i.i.d.) random variables with a uniform distribution over , then is a zero-mean complex stochastic process with variance . Under certain conditions, it can be shown  that the SOC process tends to a complex Gaussian process with variance if .
Let the line-of-sight (LOS) component be given by  where the amplitude and the phase are constant quantities, then the sum of the scattered components and the LOS component results in the following nonzero-mean complex random process:
The envelope of , which is denoted by provides an accurate and efficient simulation model for Rice processes.
2.2. Statistical Properties of SOC Models
In , it has been shown that the PDF of is given by where denotes the 0th order Bessel function of the first kind. If the gains are given by , then the PDF in (5) tends to the Rice density as , where is the order-modified Bessel function of the first kind.
Likewise, the cumulative distribution function (CDF) of has been derived in , where the following result can be found:
Owing to the fact that the PDF and the CDF do not reveal any information about how fast the channel changes with time, it is necessary to consider the second-order statistics of the envelope . In this respect, the level-crossing rate (LCR) and average duration of fades (ADF) are of special interest. The LCR describes how often the envelope crosses on average a specified signal level within one second, and the ADF describes how long on average the envelope remains below a specified signal level . These statistical quantities depend on the propagation environment and the Doppler shifts caused by the movement of the mobile station. The LCR of can be obtained by using Rice’s formula [15, 16]:
Equation (9) requires the knowledge of the joint PDF of the envelope and its time derivative . It should be mentioned that the relation in (9) holds for any stationary random process characterized by the joint PDF .
In , an exact solution has been presented for the LCR of the envelope . This exact-solution factors in that the inphase and quadrature components of the SOC process as well as their time derivatives are mutually correlated. The LCR of in (4) is given as where denotes the maximum of , which is given by . The LCR of SOC processes approaches the LCR of Rice processes as , that is, where is the Rice PDF presented in (6). The symbol represents the negative curvature of the ACF of the underlying real-valued Gaussian process at the origin . In case of isotropic scattering, the quantity is given by .
From the discussion above, it is obvious that the ADF of converges to the ADF of Rice processes as .
In addition to the symmetrical Jakes PSD: which characterizes isotropic scattering environments, it is desirable to have a fading channel simulator that is able to generate fading process characterized by both symmetrical and asymmetrical PSDs.
In this sense, the proposed fading channel simulator shall also incorporate the characteristics of non-isotropic scattering environments. The utility of the von Mises PDF as a parametric model for the distribution of the AOA has been supported by different studies focussing non-isotropic propagation scenarios . The resulting PSD includes the symmetrical Jakes PSD as a special case. In our study, the Doppler PSD obtained by using the von Mises AOA distribution will be used as a reference model for the PSD of non-isotropic scattering environments.
When using the von Mises AOA distribution, then the Doppler PSD can be written as follows  where is a concentration parameter, which controls the angular spread of the AOA, and denotes the mean AOA of the incoming plane waves. Equation (14) assumes that the PDF of the AOA follows the von Mises distribution defined by
According to , the LCR of Rayleigh processes assuming the von Mises AOA distribution can be written as and the corresponding ADF is given by For the case of isotropic scattering , the expression in (16) reduces to the LCR , and the ADF in (17) simplifies to .
3. Hardware Architecture
In this section, the hardware channel simulator based on the SOC method is presented for both isotropic and non-isotropic scattering environments. The general architecture of the proposed SOC fading channel simulator is illustrated in Figure 1. The datapath of the architecture is drawn by using the notation Q(WL,WF), where WL represents the datapath wordlength, and WF denotes the fractional part of the wordlength. The SOC fading channel simulator design is composed of four main modules: the complex sinusoid evaluation module, the sinusoid parameter generator, the global control unit, and the datapath.
In order to compute the SOC according to (1), the proposed fading channel simulator requires the initialization of the SOC parameters (), as well as the number of cisoids , which are stored in the sinusoid parameter generator. Once the simulator has been configured, the complex sinusoid evaluation module computes the th cisoid by if a positive Doppler frequency is provided. Otherwise, is computed for the case of a negative Doppler frequency, where and . This fact is obvious due to the following relation:
Once the corresponding th cisoid has been determined, it is multiplied by the gain before accumulating the resultant value in the accumulator register blocks, as shown in Figure 1.
The summation of the cisoids as well as the initialization of the SOC parameters of the simulator are handled by the global control unit. It is important to point out that the proposed architecture is parametric in the sense that it is independent of the number of cisoids and the choice of the model parameters ().
3.1. Piecewise Polynomial Approximation Technique
In case of the SOS method, the most common hardware implementation technique described in the literature for the evaluation of cosine and sine functions is the one that utilizes LUT. The main characteristic of this technique is that it uses memory blocks for storing the sinusoids. However, the use of LUT limits the evaluation of the SOS process when covering a wide range of Doppler frequencies at high data rates (i.e., Doppler frequencies in the range from mHz up to kHz at megasamples per second (MSPS)). This limitation is due to the limited number of samples that can be stored in block memories for generating the sinusoids with the lower Doppler frequencies. For example, for the generation of a sinusoid with a Doppler frequency of 1 kHz at 1 MSPS, it is necessary to store 1000 samples in a memory table. On the other hand, in order to generate a sinusoid with a Doppler frequency of 0.1 Hz at 1 MSPS, it is required to store 10 megasamples in the LUT. Techniques for saving memory resources are described in the literature (see  for more details). It is important to remark that the waveform with the lowest Doppler frequency generated by the sinusoid generator determines the frequency resolution that can be achieved by using LUT. This implies that huge memories are required in order to obtain a high frequency resolution. As a consequence, the ACF of the generated SOC process depends directly on the accuracy of the Doppler frequencies of the generated complex sinusoids. Likewise, higher-order statistics, such as the LCR and ADF, can be affected as a result of the level of accuracy in the generated waveforms .
An alternative solution that avoids the limitations imposed by LUT is provided by using a piecewise polynomial approximation technique for the sinusoid generation. This technique rests upon the approximation of a function , which is in our case a sine or cosine function, by means of the evaluation of polynomials , which are defined by the polynomial degree and the type of segmentation. The type of segmentation defines the number of intervals and the bounds of such intervals . Each polynomial is defined as follows:
An efficient procedure to evaluate the polynomials is by employing Horner’s rule as follows: where is the polynomial input, and are the polynomial coefficients.
In order to obtain the coefficients , two kinds of approximation techniques can be employed, namely, the approximation technique that minimizes the least square error between and , called the least square approximation, and the approximation technique that minimizes the worst-case error between and , called the least maximum approximation or minimax approximation. In , several methods are described for approximating a continuous function with a prespecified precision.
The piecewise polynomial approximation technique has been utilized for generating random variables in channel simulators designed by using the Monte Carlo method, where its implementation in hardware platforms makes it possible to approximate different functions efficiently . The scalability provided by a polynomial approximation architecture allows the efficient use of multiple modules in a channel simulator , which represents a good design strategy for the development of real-world channel simulators. In this work, the polynomial coefficients are computed by using the least square approximation as the error metric.
For the evaluation of the sinusoidal functions, the use of a uniform segmentation is feasible. Figure 2(a) shows two approximations of the function , where is within the range . In the first approximation, 16 piecewise polynomials of degree 1 are considered, whereas the second approximation uses 16 piecewise polynomials of degree 2. It can be seen in Figure 2(b) that the approximation using polynomials of degree 2 results in a much lower absolute error compared with the one using polynomials of degree 1. Hence, a sinusoid generator that uses a polynomial approximation of degree 2 is preferred for the generation of cisoids. It should be noted that for the hardware implementation of a polynomial of degree , multipliers and adders are required if a pipeline structure is applied, otherwise only one multiplier and one adder are required when using an iterative scheme.
3.2. Direct Digital Synthesizer Based on a Piecewise Polynomial Approximation
After analyzing the piecewise polynomial approximation, it is indispensable to visualize this technique for the generation of cisoids with different Doppler frequencies. Therefore, the structure of a direct digital synthesizer (DDS) employing the polynomial approximation technique is shown in Figure 3.
Besides the difference in the sinusoid generator concept (sinusoid storing versus sinusoid approximation), there is also a difference between the phase generator of the DDSs. While the phase generator of the LUT-based oscillator directly generates the memory addresses, the phase generator of the polynomial approximation method computes values in the interval for the case of the approximated function . This feature makes it possible to generate sinusoids for a wide range of frequencies. For the application of the SOS method, it is important that a high Doppler frequency resolution can be achieved for lower as well as for higher Doppler frequencies.
The frequency resolution of the DDS based on the polynomial approximation is determined by the sampling frequency and the quantization factor , which determines the precision of the input after its quantization with . The minimum frequency achievable by the DDS as well as the output frequency are determined by the following expressions:where is the tuning word that specifies the output frequency . With regard to the configuration of the waveform’s phase, the polynomial-based DDS has the same advantages as the LUT-based DDS. However, the phase for the polynomial approximation approach is defined in the interval . For the case of a datapath with a bit-width of 32 bits, the parameter is equal to 31 bits, and the remaining bit is used as a sign bit. Hence, the minimum frequency achievable by the DDS at an output data rate of 1 MSPS is equal to mHz. In the case of an output rate of 4096 samples per second, the frequency resolution will be μHz. In comparison with a LUT-based DDS, the same frequency resolutions can be achieved by using a LUT memory of samples if a complete sinusoid is stored, or samples if a quarter of a sinusoid is stored. It can be inferred from the discussion above that the usage of a LUT-based DDS for achieving a high frequency resolution of less than Hz is not a practical option.
The SOC method requires the evaluation of both cosine and sine waveforms (see (18)). This results in the use of either one or two polynomial-based DDS modules. Figure 4 illustrates the architecture of the poly-evaluator module, which consists of three blocks: the address generator unit (AGU), the datapath of the evaluation, which applies Horner’s rule, and the piecewise polynomial coefficients used for storing the polynomial coefficients. When the value is generated, this value is passed through the AGU module to compute the address of the corresponding polynomial coefficients. Once the address is obtained, the evaluation is performed while the argument and the three coefficients are being passed across the datapath, as it can be seen at the bottom of Figure 4. The cisoid evaluation requires two clock cycles when employing a single poly-evaluator module. However, when two modules are used, the cisoid evaluation is achieved within a single clock cycle. In addition to the cisoid evaluation, the poly-evaluator module has been applied for the generation of Gaussian random variables , which demonstrates the usefulness of the piecewise polynomial approximation technique.
4. Parameter Computation Methods
In order to demonstrate the performance of the proposed hardware fading channel simulator under different propagation scenarios, two methods were chosen to compute the parameters of the SOC model: the extended method of exact Doppler spread (EMEDS) for the case of isotropic scattering and the modified method of equal areas (MMEA) for non-isotropic scattering.
4.1. The EMEDS
The EMEDS was proposed in  as an extension of the method of exact Doppler spread (MEDS) . The MEDS was originally proposed for computing the model parameters of SOS Rayleigh fading channel simulators, while the EMEDS has been developed for the parametrization of SOC Rayleigh fading channel simulators. Currently, the EMEDS is one of the principal methods for computing the model parameters of SOC channel models. This method has been highly recognized in the case of isotropic scattering.
4.2. The MMEA
Currently, there are only some few methods available for computing the model parameters of SOC models under non-isotropic scattering conditions . The MMEA provides a reasonably good solution for this kind of problems. The MMEA [27, 28] is a modification of the method of equal areas (MEA) reported in . The MMEA methodology requires the computation of an inverse function for obtaining a set of Doppler frequencies. When using the MMEA, it is necessary to compute first the cumulative power function (CPF) of a given asymmetrical PSD, and then one has to find the inverse CPF (ICPF). An algorithm was developed using MATLAB in order to obtain the ICPF function. This algorithm uses a piecewise polynomial approximation technique. It is completely parameterizable, allowing the configuration of the polynomial degree, the number of segments at which the ICPF is approximated, the segmentation technique (uniform or non-uniform segmentation), and the method for obtaining the polynomial coefficients (least square or minimax approximation).
Once the ICPF is obtained, the Doppler frequencies are computed according to the following expression: where represents the ICPF. The path gains are computed by using (22).
5. Test Results
Using the parameter computation methods described in Section 4, the accuracy of the proposed architecture will be evaluated in the present section. For this reason, the hardware channel simulator has been configured and tested according to the criteria described in the following subsection.
5.1. Test Configuration
In addition to the path gains and Doppler frequencies , the phases have been computed using a uniform random number generator, as reported in . For the generation of Rayleigh processes, the LOS component in (2) has been set to zero, that is, . The number of cisoids was set to , the segment number for the sine and cosine function generation was 32, and the datapath in the general architecture was equal to bits. This configuration has been chosen for comparison purposes with other available architectures (see Section 6). The maximum Doppler frequency was fixed to Hz. The variance was equal to unity in case of isotropic scattering (Jakes PSD). For non-isotropic scattering (von Mises PSD), the parameter was set to 0.5. Finally, the statistical properties were obtained by averaging the results over trials, and updating only the phases for each trial.
5.2. Hardware Test Results
The comparison results of the proposed hardware fading channel simulator and the reference model for isotropic scattering (Jakes PSD) are presented in Figure 5. The PDF, CDF, and LCR of the reference model are described by (6), (8), and (11), respectively. The results obtained for the reference model are shown in form of continuous lines. The ADF of the reference model has been found by computing the quotient of the expressions in (8) and (11).
Equations (5), (7), (10), and (12) are plotted in Figure 5 as dashed lines, which represent the theoretical results of the simulation model. The experimental results of the implemented SOC simulation model in floating-point representation have been computed using MATLAB. This model has been implemented for reasons of comparison with the hardware implementation. The envelope generated by the SOC model can be identified in the plots by dot markers. Finally, the square markers are used for illustrating the behavior of the proposed hardware fading channel simulator.
Figure 5(a) shows the PDF plots of the generated envelope process for cisoids. This PDF converges to the Rayleigh density as increases. However, the resulting PDF obtained with the hardware output samples has a perfect match with the corresponding PDFs of the theoretical and experimental simulation models. The CDF comparison is presented in Figure 5(b). The normalized LCR is plotted in Figure 5(c) and its corresponding plot in decibels (dB) is shown in Figure 5(d). Finally, Figure 5(e) shows the comparison of the ADFs.
Figure 6 illustrates the results when the proposed architecture is configured for producing samples under non-isotropic scattering conditions using the von Mises AOA distribution. The parameters and were set according to the following configurations: (,), (,), and (,). The PDF and CDF plots of the generated envelope process are shown in Figures 6(a) and 6(b), respectively. The resulting LCR for the different configurations of and is presented in Figure 6(c), and its corresponding plot in decibels (dB) is illustrated in Figure 6(d). Figure 6(e) shows the plot corresponding to the ADF. It can be observed that for and , the graphs of the reference model defined for the cases of isotropic and non-isotropic scattering perfectly overlap with the experimental results.
6. Performance Analysis
The performance of the proposed hardware channel simulator was analyzed using 32, 24, 18, and 16 bits for WL. The implementation was synthesized in a Xilinx Virtex5 FPGA (XC5VLX110T-3FF1136). The used hardware resources of the hardware architecture are summarized in Table 1. The four random-access memories (RAMs) are needed for storing the gains (one RAM block), the Doppler frequencies (one RAM block), and the cosine and sine phases (one RAM block each). It is important to mention that the RAM sizes are parameterizable in accordance to the number of cisoids . On the other hand, the read-only memories (ROMs) allocate the coefficients of the polynomial approximation. In this case, the number of segments has been configured to 32. Consequently, only three ROMs of 32 memory locations (for each quadrature component) are needed for a single poly-evaluator module. Likewise, the multipliers are distributed as follows: two multipliers for each poly-evaluator module and two multipliers for the multiplication between the gain and the cisoid.
Table 2 shows the performance comparison of the proposed architecture with the hardware fading channel simulators. These simulators, which are also using the SOS principle, are the most representative and novel works described in [9, 10]. In , a MIMO channel simulator has been implemented using 32 stochastic processes. The inphase and quadrature phases of the channel model are updated for each realization using a random walk process. Moreover, in , a triply selective SOS fading channel simulator has been implemented, where the sinusoids are generated in parallel fashion. It should be noted that a detailed comparison of the hardware resources is difficult to achieve. This is due to the differences in hardware implementation, as well as due to the FPGA technologies utilized in the references [9, 10].
|Note: The hardware resources have been deduced from [9, 10] by considering a single Rayleigh process.|
1The symbol is the LUT size, which is not provided in .
In order to ensure a fair comparison, the hardware resources of the fading channel simulators described in [9, 10] have been inferred from the architecture schematics described by the authors. Therefore, Table 2 only considers the hardware resources of a single SOS Rayleigh fading channel simulator module. From Table 2, it can be observed that the principal resource saved by using the proposed architecture lies in the ROMs, which are needed for implementing the sine/cosine functions of the SOS models for all compared methods. This saving is due to the fact that our architecture only stores the polynomial coefficients for the cosine/sine function generation, while the other architectures have to store a rather large number of sinusoid samples. Furthermore, the use of the polynomial approximation technique makes it possible to achieve a high frequency resolution with regard to the sinusoid generation, which greatly improves the statistics of the generated process. In this work, the frequency resolution achieved is 7.63 μHz. This value has been computed using (21a), where the fading generation rate is samples per second.
It should be highlighted that  requires only a single multiplier in its architecture. However, this restricts the architecture to SOS models in which all sinusoids have the same amplitude. This is in contrast to the proposed architecture that can be used for any SOS/SOC model, even if the sinusoids do not have the same amplitude. Besides the hardware differences in previous works and the ones proposed here, the most important difference lies in the functionality: only the proposed simulator has the capability of generating waveforms characterized by both symmetrical and asymmetrical PSDs.
In this paper, an efficient hardware SOC fading simulator was presented. This flexible and parametric architecture is capable of generating stochastic processes with symmetrical and asymmetrical PSDs. The use of a piecewise polynomial approximation technique allows generating cisoids with a high frequency resolution, which results in highly accurate first- and second-order statistics of the generated envelope processes. This allows the reproduction of realistic channel scenarios, as required in the latest wireless communications standards. In addition, the architecture described in this paper is simple and easy to implement, considering that only small hardware resources are needed in comparison with other hardware SOS simulators. Therefore, the proposed architecture can be considered as a key module for development of more elaborated channel simulators, such as wideband and MIMO channel simulators.
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