Research Article
An Efficient Lightweight Cryptographic Instructions Set Extension for IoT Device Security
Table 10
Synthesis results of customized ReonV processor with Spartan-6 FPGA board.
| Design | Area (resources) | Performance | Occupation (slice LUTs + FF-pairs) | % AreaOverhead | Max. freq. (MHz) | Throughput (Mbps) |
| Original ReonV without ext. | 3757 | — | 133.074 | — | Modified ReonV with PRESENT instr. | 3770 | 1% | 132.769 | 1213.888 | Modified ReonV with PRINCE instr. | 3765 | 1% | 132.103 | 1207.798 |
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