Research Article

An Efficient Lightweight Cryptographic Instructions Set Extension for IoT Device Security

Table 4

Comparison of our proposed hardware implementation results obtained on FPGAs platforms.

CipherDesignsFPGA boardsData width size (bit)Area (slices)SpeedEfficiency (Mbps/slice)Power (W)Energy/bit (pJ/bit)
Latency (cycles)Max. freq. (MHz)Throughput (Mbps)

PRESENTThis workZync-700032616726.21239.630.3890.22918.065
This workKintex-732610762.206568.7400.9320.114200.443
64950139.2625134.2230.09839.003
[28]64151100206.451.367
This workSpartan-632594727.62252.530.4250.11435.56
This work64858117.881144.321.3340.06960.3
[29]6412113.563.470.0287
C4 [30]6447439613.562.190.004623.4510.7 × 106

PRINCEThis workZync-700032406786.71792.781.9520.23290.119
This workKintex-732262794.451863.5523.2960.08598.431
64533178.0849979.3750.17434.82
[31]64539161.4239317.2900.04511.448
This workSpartan-632383738.69353.700.9230.12339.235
This work64465134.042178.564.6850.11552.785
[32]Virtex-664482165.38141848.682.875687.078
[33]Virtex-40364956131.7620322.1250.16581.175