Modeling the Power Variability of Core Speed Scaling on Homogeneous Multicore Systems

Figure 1

A motivating example to demonstrate that the power consumption of each core is determined by its own core speed and the speeds of other cores on the same chip. The employed AMD multicore processor has 4 cores with per-core DVFS. Initially, all cores run at the same frequency of 0.8 GHz. Then, one of the cores scales up its frequency by one step every 30 seconds until the frequency reaches the highest value of 2.5 GHz. This process repeats on another core until all cores run at the highest frequency. After that, the experiment continues in reverse until all cores drop their frequencies to 0.8 GHz.