Facilitating Preemptive Hardware System Design Using Partial Reconfiguration Techniques

<table class="table-group" width="800px"><tr class="fig-image" id="a"><td><img alt="164059.fig.005a" src="https://static.hindawi.com/articles/tswj/volume-2014/164059/figures/164059.fig.005a.jpg"/></td></tr><tr class="fig-caption"><td align="center"><table><tr><td><b>(a) </b>Flat layout.</td></tr></table></td></tr><tr class="fig-image" id="b"><td><img alt="164059.fig.005b" src="https://static.hindawi.com/articles/tswj/volume-2014/164059/figures/164059.fig.005b.jpg"/></td></tr><tr class="fig-caption"><td align="center"><table><tr><td><b>(b) </b>Hierarchical layout.</td></tr></table></td></tr></table>

<table>Dynamic reconfigurable areas layout.</table>

The Scientific World Journal

fig5

Figure 5

Figure 5: Facilitating Preemptive Hardware System Design Using Partial Reconfiguration Techniques 