Research Article

A Low-Complexity Euclidean Orthogonal LDPC Architecture for Low Power Applications

Table 3

Analysis of decoding latency.

MethodologyDecoding latency (ns)CMOS technologyFrequency (MHz)

Proposed22.0245 nm200
Spagnol et al. (2009) [4]50.0565 nm300
Kim and Sobelman (2013) [5]56.36180 nm450