Research Article

A Low-Complexity Euclidean Orthogonal LDPC Architecture for Low Power Applications

Table 4

Comparison of power consumptions of conventional methods.

MethodologyPower consumption (mW)**CMOS technologyEnergy consumption (nJ)*

Proposed method2745 nm104.7
Ismail et al. (2013) [6]33.1465 nm144.9
Blanksby and Howland (2002) [7]69090 nm256.1
Mansour and Shanbhag (2006) [8]78765 nm320.0
Mohsenin et al. (2010) [9]1359180 nm389.9

*Energy consumption of one clock period. This comparison is only for the energy in one clock cycle, which maps to the power consumption.
**Code rate is 0.96 and word length is 7 bits with 8 iterations.