A New Theory for Testability-Preserving Optimization of Combinational Circuits

Abstract

Testability should be considered as early as possible in VLSI synthesis and optimization. In most CAD tools, testability preservation is achieved as a by-product of finding a less redundant implementation. Unfortunately, this approach is not supported by theory. It is essential to have an optimization scheme that systematically preserves testability. A complete theory covering testability-preserving optimization of combinational circuits is yet to be developed.In this paper, a new testability-preserving theory is established. This theory covers most optimization cases in the synthesis of irredundant circuits. Optimization of redundant circuits is also considered. Algorithms based on this theory are proposed. Experiments to verify the theory and algorithms are reported. The developed theory and algorithms are more general than previous results.