Abstract
This paper presents an overview of Zener zap anti-fuse trim as used to achieve improved accuracy in precision integrated circuits. Because this technology spans design and manufacturing, elements of design, layout, processing, and testing are included. The mechanism is defined and typical applications are discussed. Layout considerations of anti-fuse devices are summarized and complex trim networks and multiplexed control methods are presented. Both bipolar and CMOS process implementations are considered. The paper also contains a bibliography which includes U.S. patents, which make up a large part of the technical documentation of this technology.