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VLSI Design
Volume 5 (1996), Issue 1, Pages 11-21
http://dx.doi.org/10.1155/1996/53512

Greedy Segmented Channel Router

1Design Automation Laboratory, Department of Electrical and Computer Engineering & Computer Science, P.O. Box 210030, University of Cincinnati, Cincinnati, OH 45221-0030, USA
2Mail Stop: JF1-61, 2111 N.E. 25th Ave., Intel Corporation, 97124-5961, Hillsboro, OR, USA

Received 3 August 1994; Accepted 3 February 1996

Copyright © 1996 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

Dinesh Bhatia and V. Shankar, “Greedy Segmented Channel Router,” VLSI Design, vol. 5, no. 1, pp. 11-21, 1996. doi:10.1155/1996/53512